CLOCK GENERATION INTEGRATED CIRCUIT AND SYSTEM BOARD

PROBLEM TO BE SOLVED: To provide a clock generation IC (integrated circuit) for a PC capable of easily generating a clock of a desired frequency without user having to make a parameter calculation and displaying an actual frequency value of a clock obtained by setting at the outside to enable the us...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: NAKANO KENICHI, TAKAGI KOJI, KOBAYASHI ISAO, KOSHIO KAZUHIRO, MORISHIGE TAKAHARU
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator NAKANO KENICHI
TAKAGI KOJI
KOBAYASHI ISAO
KOSHIO KAZUHIRO
MORISHIGE TAKAHARU
description PROBLEM TO BE SOLVED: To provide a clock generation IC (integrated circuit) for a PC capable of easily generating a clock of a desired frequency without user having to make a parameter calculation and displaying an actual frequency value of a clock obtained by setting at the outside to enable the user to confirm the actual frequency value, and to provide a system board mounted with the clock generation IC. SOLUTION: In a PC motherboard, a clock generator 7 is provided with a frequency conversion table 22 between a register 21 included in an IF 16 for communication and respective frequency dividing circuits 17, 19 and 12 to 15. The user can generate a clock of a desired frequency only by setting the desired frequency because the frequency conversion table 22 has a function for outputting the values of parameters M, N and K needed to generate clocks of corresponding frequencies on the basis of data corresponding to the frequencies of clocks when data are inputted. COPYRIGHT: (C)2004,JPO
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2004180078A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2004180078A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2004180078A3</originalsourceid><addsrcrecordid>eNrjZDBx9vF39lZwd_VzDXIM8fT3U_D0C3F1B7JdXRScPYOcQz1DFBz9XBSCI4NDXH0VnPwdg1x4GFjTEnOKU3mhNDeDkptriLOHbmpBfnxqcUFicmpeakm8V4CRgYGJoYWBgbmFozFRigANFie9</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>CLOCK GENERATION INTEGRATED CIRCUIT AND SYSTEM BOARD</title><source>esp@cenet</source><creator>NAKANO KENICHI ; TAKAGI KOJI ; KOBAYASHI ISAO ; KOSHIO KAZUHIRO ; MORISHIGE TAKAHARU</creator><creatorcontrib>NAKANO KENICHI ; TAKAGI KOJI ; KOBAYASHI ISAO ; KOSHIO KAZUHIRO ; MORISHIGE TAKAHARU</creatorcontrib><description>PROBLEM TO BE SOLVED: To provide a clock generation IC (integrated circuit) for a PC capable of easily generating a clock of a desired frequency without user having to make a parameter calculation and displaying an actual frequency value of a clock obtained by setting at the outside to enable the user to confirm the actual frequency value, and to provide a system board mounted with the clock generation IC. SOLUTION: In a PC motherboard, a clock generator 7 is provided with a frequency conversion table 22 between a register 21 included in an IF 16 for communication and respective frequency dividing circuits 17, 19 and 12 to 15. The user can generate a clock of a desired frequency only by setting the desired frequency because the frequency conversion table 22 has a function for outputting the values of parameters M, N and K needed to generate clocks of corresponding frequencies on the basis of data corresponding to the frequencies of clocks when data are inputted. COPYRIGHT: (C)2004,JPO</description><edition>7</edition><language>eng</language><subject>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES ; BASIC ELECTRONIC CIRCUITRY ; CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; PHYSICS</subject><creationdate>2004</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20040624&amp;DB=EPODOC&amp;CC=JP&amp;NR=2004180078A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20040624&amp;DB=EPODOC&amp;CC=JP&amp;NR=2004180078A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>NAKANO KENICHI</creatorcontrib><creatorcontrib>TAKAGI KOJI</creatorcontrib><creatorcontrib>KOBAYASHI ISAO</creatorcontrib><creatorcontrib>KOSHIO KAZUHIRO</creatorcontrib><creatorcontrib>MORISHIGE TAKAHARU</creatorcontrib><title>CLOCK GENERATION INTEGRATED CIRCUIT AND SYSTEM BOARD</title><description>PROBLEM TO BE SOLVED: To provide a clock generation IC (integrated circuit) for a PC capable of easily generating a clock of a desired frequency without user having to make a parameter calculation and displaying an actual frequency value of a clock obtained by setting at the outside to enable the user to confirm the actual frequency value, and to provide a system board mounted with the clock generation IC. SOLUTION: In a PC motherboard, a clock generator 7 is provided with a frequency conversion table 22 between a register 21 included in an IF 16 for communication and respective frequency dividing circuits 17, 19 and 12 to 15. The user can generate a clock of a desired frequency only by setting the desired frequency because the frequency conversion table 22 has a function for outputting the values of parameters M, N and K needed to generate clocks of corresponding frequencies on the basis of data corresponding to the frequencies of clocks when data are inputted. COPYRIGHT: (C)2004,JPO</description><subject>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2004</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDBx9vF39lZwd_VzDXIM8fT3U_D0C3F1B7JdXRScPYOcQz1DFBz9XBSCI4NDXH0VnPwdg1x4GFjTEnOKU3mhNDeDkptriLOHbmpBfnxqcUFicmpeakm8V4CRgYGJoYWBgbmFozFRigANFie9</recordid><startdate>20040624</startdate><enddate>20040624</enddate><creator>NAKANO KENICHI</creator><creator>TAKAGI KOJI</creator><creator>KOBAYASHI ISAO</creator><creator>KOSHIO KAZUHIRO</creator><creator>MORISHIGE TAKAHARU</creator><scope>EVB</scope></search><sort><creationdate>20040624</creationdate><title>CLOCK GENERATION INTEGRATED CIRCUIT AND SYSTEM BOARD</title><author>NAKANO KENICHI ; TAKAGI KOJI ; KOBAYASHI ISAO ; KOSHIO KAZUHIRO ; MORISHIGE TAKAHARU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2004180078A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2004</creationdate><topic>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>NAKANO KENICHI</creatorcontrib><creatorcontrib>TAKAGI KOJI</creatorcontrib><creatorcontrib>KOBAYASHI ISAO</creatorcontrib><creatorcontrib>KOSHIO KAZUHIRO</creatorcontrib><creatorcontrib>MORISHIGE TAKAHARU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>NAKANO KENICHI</au><au>TAKAGI KOJI</au><au>KOBAYASHI ISAO</au><au>KOSHIO KAZUHIRO</au><au>MORISHIGE TAKAHARU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>CLOCK GENERATION INTEGRATED CIRCUIT AND SYSTEM BOARD</title><date>2004-06-24</date><risdate>2004</risdate><abstract>PROBLEM TO BE SOLVED: To provide a clock generation IC (integrated circuit) for a PC capable of easily generating a clock of a desired frequency without user having to make a parameter calculation and displaying an actual frequency value of a clock obtained by setting at the outside to enable the user to confirm the actual frequency value, and to provide a system board mounted with the clock generation IC. SOLUTION: In a PC motherboard, a clock generator 7 is provided with a frequency conversion table 22 between a register 21 included in an IF 16 for communication and respective frequency dividing circuits 17, 19 and 12 to 15. The user can generate a clock of a desired frequency only by setting the desired frequency because the frequency conversion table 22 has a function for outputting the values of parameters M, N and K needed to generate clocks of corresponding frequencies on the basis of data corresponding to the frequencies of clocks when data are inputted. COPYRIGHT: (C)2004,JPO</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JP2004180078A
source esp@cenet
subjects AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
title CLOCK GENERATION INTEGRATED CIRCUIT AND SYSTEM BOARD
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-28T17%3A25%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=NAKANO%20KENICHI&rft.date=2004-06-24&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJP2004180078A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true