SEMICONDUCTOR MEMORY DEVICE

PROBLEM TO BE SOLVED: To provide a semiconductor memory device in which stability of read or write operation can be secured. SOLUTION: In read or write operation, in a freeze releasing circuit 60 in a semiconductor memory device, when a row-act signal /ROWACT is not activated in the prescribed period decided by a trailing edge delay circuit DL10 after a chip enable-signal/CE is made an H level, a freeze reset signal /FREEZRST is outputted from a logic gate L14 after the elapse of the prescribed period. Consequently, the semiconductor memory device finishes write or read operation. COPYRIGHT: (C)2004,JPO