MULTILAYER PRINTED WIRING BOARD

PROBLEM TO BE SOLVED: To obtain a multilayer printed wiring board containing an electronic component which prevents a crack from occurring in an insulating layer laminat ed and formed on a through hole or a solder resist layer in a reliability evaluat ing test (particularly a thermal impact test of...

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Hauptverfasser: IGAI NORIHIKO, SUMI YASUSHI, KOJIMA TOSHIFUMI, OKUYAMA MASAHIKO
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creator IGAI NORIHIKO
SUMI YASUSHI
KOJIMA TOSHIFUMI
OKUYAMA MASAHIKO
description PROBLEM TO BE SOLVED: To obtain a multilayer printed wiring board containing an electronic component which prevents a crack from occurring in an insulating layer laminat ed and formed on a through hole or a solder resist layer in a reliability evaluat ing test (particularly a thermal impact test of repeating cooling to -55 deg.C and heating to 125 deg.C), which improves electric characteristics by reducing a parasitic capacity and which lowers a back surface height. SOLUTION: The multilayer printed wiring board comprises a build-up layer having insulating layers and wiring layers alternatively laminated on at least one surface of a core board and openings and through-holes formed so as to pass through the core board and the build-up layer. In the substrate, an electronic component is disposed in the opening, and embedded by using the embedding resin. A cured material of a paste or filling in the through-hole having an absolute value of a difference of a thermal expansion coefficient of a thickness direction (Z-axis direction) of the core board of 20 ppm/ deg.C or lower is filled in the through-hole. An elastic modulus of the cured material of the paste at 25 deg.C is desirably in a range of 3.0 to 6.5 GPa.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2003069229A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2003069229A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2003069229A3</originalsourceid><addsrcrecordid>eNrjZJD3DfUJ8fRxjHQNUggI8vQLcXVRCPcEMtwVnPwdg1x4GFjTEnOKU3mhNDeDkptriLOHbmpBfnxqcUFicmpeakm8V4CRgYGxgZmlkZGlozFRigAmlCIy</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MULTILAYER PRINTED WIRING BOARD</title><source>esp@cenet</source><creator>IGAI NORIHIKO ; SUMI YASUSHI ; KOJIMA TOSHIFUMI ; OKUYAMA MASAHIKO</creator><creatorcontrib>IGAI NORIHIKO ; SUMI YASUSHI ; KOJIMA TOSHIFUMI ; OKUYAMA MASAHIKO</creatorcontrib><description>PROBLEM TO BE SOLVED: To obtain a multilayer printed wiring board containing an electronic component which prevents a crack from occurring in an insulating layer laminat ed and formed on a through hole or a solder resist layer in a reliability evaluat ing test (particularly a thermal impact test of repeating cooling to -55 deg.C and heating to 125 deg.C), which improves electric characteristics by reducing a parasitic capacity and which lowers a back surface height. SOLUTION: The multilayer printed wiring board comprises a build-up layer having insulating layers and wiring layers alternatively laminated on at least one surface of a core board and openings and through-holes formed so as to pass through the core board and the build-up layer. In the substrate, an electronic component is disposed in the opening, and embedded by using the embedding resin. A cured material of a paste or filling in the through-hole having an absolute value of a difference of a thermal expansion coefficient of a thickness direction (Z-axis direction) of the core board of 20 ppm/ deg.C or lower is filled in the through-hole. An elastic modulus of the cured material of the paste at 25 deg.C is desirably in a range of 3.0 to 6.5 GPa.</description><edition>7</edition><language>eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS</subject><creationdate>2003</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20030307&amp;DB=EPODOC&amp;CC=JP&amp;NR=2003069229A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20030307&amp;DB=EPODOC&amp;CC=JP&amp;NR=2003069229A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>IGAI NORIHIKO</creatorcontrib><creatorcontrib>SUMI YASUSHI</creatorcontrib><creatorcontrib>KOJIMA TOSHIFUMI</creatorcontrib><creatorcontrib>OKUYAMA MASAHIKO</creatorcontrib><title>MULTILAYER PRINTED WIRING BOARD</title><description>PROBLEM TO BE SOLVED: To obtain a multilayer printed wiring board containing an electronic component which prevents a crack from occurring in an insulating layer laminat ed and formed on a through hole or a solder resist layer in a reliability evaluat ing test (particularly a thermal impact test of repeating cooling to -55 deg.C and heating to 125 deg.C), which improves electric characteristics by reducing a parasitic capacity and which lowers a back surface height. SOLUTION: The multilayer printed wiring board comprises a build-up layer having insulating layers and wiring layers alternatively laminated on at least one surface of a core board and openings and through-holes formed so as to pass through the core board and the build-up layer. In the substrate, an electronic component is disposed in the opening, and embedded by using the embedding resin. A cured material of a paste or filling in the through-hole having an absolute value of a difference of a thermal expansion coefficient of a thickness direction (Z-axis direction) of the core board of 20 ppm/ deg.C or lower is filled in the through-hole. An elastic modulus of the cured material of the paste at 25 deg.C is desirably in a range of 3.0 to 6.5 GPa.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2003</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJD3DfUJ8fRxjHQNUggI8vQLcXVRCPcEMtwVnPwdg1x4GFjTEnOKU3mhNDeDkptriLOHbmpBfnxqcUFicmpeakm8V4CRgYGxgZmlkZGlozFRigAmlCIy</recordid><startdate>20030307</startdate><enddate>20030307</enddate><creator>IGAI NORIHIKO</creator><creator>SUMI YASUSHI</creator><creator>KOJIMA TOSHIFUMI</creator><creator>OKUYAMA MASAHIKO</creator><scope>EVB</scope></search><sort><creationdate>20030307</creationdate><title>MULTILAYER PRINTED WIRING BOARD</title><author>IGAI NORIHIKO ; SUMI YASUSHI ; KOJIMA TOSHIFUMI ; OKUYAMA MASAHIKO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2003069229A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2003</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><toplevel>online_resources</toplevel><creatorcontrib>IGAI NORIHIKO</creatorcontrib><creatorcontrib>SUMI YASUSHI</creatorcontrib><creatorcontrib>KOJIMA TOSHIFUMI</creatorcontrib><creatorcontrib>OKUYAMA MASAHIKO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>IGAI NORIHIKO</au><au>SUMI YASUSHI</au><au>KOJIMA TOSHIFUMI</au><au>OKUYAMA MASAHIKO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MULTILAYER PRINTED WIRING BOARD</title><date>2003-03-07</date><risdate>2003</risdate><abstract>PROBLEM TO BE SOLVED: To obtain a multilayer printed wiring board containing an electronic component which prevents a crack from occurring in an insulating layer laminat ed and formed on a through hole or a solder resist layer in a reliability evaluat ing test (particularly a thermal impact test of repeating cooling to -55 deg.C and heating to 125 deg.C), which improves electric characteristics by reducing a parasitic capacity and which lowers a back surface height. SOLUTION: The multilayer printed wiring board comprises a build-up layer having insulating layers and wiring layers alternatively laminated on at least one surface of a core board and openings and through-holes formed so as to pass through the core board and the build-up layer. In the substrate, an electronic component is disposed in the opening, and embedded by using the embedding resin. A cured material of a paste or filling in the through-hole having an absolute value of a difference of a thermal expansion coefficient of a thickness direction (Z-axis direction) of the core board of 20 ppm/ deg.C or lower is filled in the through-hole. An elastic modulus of the cured material of the paste at 25 deg.C is desirably in a range of 3.0 to 6.5 GPa.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
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source esp@cenet
subjects CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
title MULTILAYER PRINTED WIRING BOARD
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-21T07%3A08%3A52IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=IGAI%20NORIHIKO&rft.date=2003-03-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJP2003069229A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true