SEALING STRUCTURE OF MULTI-CHIP MODULE

PROBLEM TO BE SOLVED: To provide a multi-chip module sealing structure which is superior in cooling performance and sealing reliability. SOLUTION: A semiconductor device 2 is mounted on a wiring board 1, the top surface of the wiring board 1 is fixed by soldering 8 to the undersurfaces of first fram...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: YASUDA AKIHIRO, KOYANO KOICHI, TAKAHASHI KOICHI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator YASUDA AKIHIRO
KOYANO KOICHI
TAKAHASHI KOICHI
description PROBLEM TO BE SOLVED: To provide a multi-chip module sealing structure which is superior in cooling performance and sealing reliability. SOLUTION: A semiconductor device 2 is mounted on a wiring board 1, the top surface of the wiring board 1 is fixed by soldering 8 to the undersurfaces of first frames 5 of which each thermal expansion coefficient conforms to that of the wiring board 1. Each of the upper parts of the first frames 5 is extended outside of the edges of the wiring board 1, the lower part of the air-cooling heat sink 7 and the top surfaces of the second frames 10 are fastened by bolts 9 through the intermediary of an O-ring between a large air-cooling heat sink 7 covering the frames 5 sufficiently and the first frames 5, and through the intermediary of plastic pieces 6 between the inner middle stages of second frames 10 of which each thermal expansion coefficient conforms to that of the air-cooling heat sink 7 and the outer middle stage of the first frames 5.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2003068969A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2003068969A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2003068969A3</originalsourceid><addsrcrecordid>eNrjZFALdnX08fRzVwgOCQp1DgkNclXwd1PwDfUJ8dR19vAMUPD1dwn1ceVhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfFeAUYGBsYGZhaWZpaOxkQpAgAShSQi</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEALING STRUCTURE OF MULTI-CHIP MODULE</title><source>esp@cenet</source><creator>YASUDA AKIHIRO ; KOYANO KOICHI ; TAKAHASHI KOICHI</creator><creatorcontrib>YASUDA AKIHIRO ; KOYANO KOICHI ; TAKAHASHI KOICHI</creatorcontrib><description>PROBLEM TO BE SOLVED: To provide a multi-chip module sealing structure which is superior in cooling performance and sealing reliability. SOLUTION: A semiconductor device 2 is mounted on a wiring board 1, the top surface of the wiring board 1 is fixed by soldering 8 to the undersurfaces of first frames 5 of which each thermal expansion coefficient conforms to that of the wiring board 1. Each of the upper parts of the first frames 5 is extended outside of the edges of the wiring board 1, the lower part of the air-cooling heat sink 7 and the top surfaces of the second frames 10 are fastened by bolts 9 through the intermediary of an O-ring between a large air-cooling heat sink 7 covering the frames 5 sufficiently and the first frames 5, and through the intermediary of plastic pieces 6 between the inner middle stages of second frames 10 of which each thermal expansion coefficient conforms to that of the air-cooling heat sink 7 and the outer middle stage of the first frames 5.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>2003</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20030307&amp;DB=EPODOC&amp;CC=JP&amp;NR=2003068969A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25555,76308</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20030307&amp;DB=EPODOC&amp;CC=JP&amp;NR=2003068969A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YASUDA AKIHIRO</creatorcontrib><creatorcontrib>KOYANO KOICHI</creatorcontrib><creatorcontrib>TAKAHASHI KOICHI</creatorcontrib><title>SEALING STRUCTURE OF MULTI-CHIP MODULE</title><description>PROBLEM TO BE SOLVED: To provide a multi-chip module sealing structure which is superior in cooling performance and sealing reliability. SOLUTION: A semiconductor device 2 is mounted on a wiring board 1, the top surface of the wiring board 1 is fixed by soldering 8 to the undersurfaces of first frames 5 of which each thermal expansion coefficient conforms to that of the wiring board 1. Each of the upper parts of the first frames 5 is extended outside of the edges of the wiring board 1, the lower part of the air-cooling heat sink 7 and the top surfaces of the second frames 10 are fastened by bolts 9 through the intermediary of an O-ring between a large air-cooling heat sink 7 covering the frames 5 sufficiently and the first frames 5, and through the intermediary of plastic pieces 6 between the inner middle stages of second frames 10 of which each thermal expansion coefficient conforms to that of the air-cooling heat sink 7 and the outer middle stage of the first frames 5.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2003</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFALdnX08fRzVwgOCQp1DgkNclXwd1PwDfUJ8dR19vAMUPD1dwn1ceVhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfFeAUYGBsYGZhaWZpaOxkQpAgAShSQi</recordid><startdate>20030307</startdate><enddate>20030307</enddate><creator>YASUDA AKIHIRO</creator><creator>KOYANO KOICHI</creator><creator>TAKAHASHI KOICHI</creator><scope>EVB</scope></search><sort><creationdate>20030307</creationdate><title>SEALING STRUCTURE OF MULTI-CHIP MODULE</title><author>YASUDA AKIHIRO ; KOYANO KOICHI ; TAKAHASHI KOICHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2003068969A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2003</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>YASUDA AKIHIRO</creatorcontrib><creatorcontrib>KOYANO KOICHI</creatorcontrib><creatorcontrib>TAKAHASHI KOICHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YASUDA AKIHIRO</au><au>KOYANO KOICHI</au><au>TAKAHASHI KOICHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEALING STRUCTURE OF MULTI-CHIP MODULE</title><date>2003-03-07</date><risdate>2003</risdate><abstract>PROBLEM TO BE SOLVED: To provide a multi-chip module sealing structure which is superior in cooling performance and sealing reliability. SOLUTION: A semiconductor device 2 is mounted on a wiring board 1, the top surface of the wiring board 1 is fixed by soldering 8 to the undersurfaces of first frames 5 of which each thermal expansion coefficient conforms to that of the wiring board 1. Each of the upper parts of the first frames 5 is extended outside of the edges of the wiring board 1, the lower part of the air-cooling heat sink 7 and the top surfaces of the second frames 10 are fastened by bolts 9 through the intermediary of an O-ring between a large air-cooling heat sink 7 covering the frames 5 sufficiently and the first frames 5, and through the intermediary of plastic pieces 6 between the inner middle stages of second frames 10 of which each thermal expansion coefficient conforms to that of the air-cooling heat sink 7 and the outer middle stage of the first frames 5.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_JP2003068969A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
title SEALING STRUCTURE OF MULTI-CHIP MODULE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-14T19%3A35%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=YASUDA%20AKIHIRO&rft.date=2003-03-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJP2003068969A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true