MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device which can reduce the variance of a gate electrode in size. SOLUTION: On an Si substrate 11, a gate oxide film 12 is formed, as shown by Fig. (a), and a polysilicon layer 13 is formed thereupon. After phosphorus is dif...

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1. Verfasser: KOBAYASHI HIROBUMI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device which can reduce the variance of a gate electrode in size. SOLUTION: On an Si substrate 11, a gate oxide film 12 is formed, as shown by Fig. (a), and a polysilicon layer 13 is formed thereupon. After phosphorus is diffused in the polysilicon layer 13, a natural oxide film 14 is formed over the whole polysilicon layer 13 to arbitrary film thickness before a next resist layer is applied. Here, the natural oxide film 14 on the polysilicon layer 13 is removed, by DHF cleaning (with diluted HF), as shown in Fig. (b). Then a resist layer 15 is applied onto the polysilicon layer 13 and patterned, and dry etching is carried out, by using the resist layer 15 as a mask to form a polysilicon gate electrode G.