LEAD FRAME FOR SEMICONDUCTOR DEVICE
PROBLEM TO BE SOLVED: To provide a lead frame for a semiconductor device, in which a fillet can be formed sufficiently at the tip of an outer lead part, when a soldering operation is performed, and in which the bonding strength is high. SOLUTION: The lead frame is provided with a frame part 23, a ch...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | KITAYAMA YOSHITERU |
| description | PROBLEM TO BE SOLVED: To provide a lead frame for a semiconductor device, in which a fillet can be formed sufficiently at the tip of an outer lead part, when a soldering operation is performed, and in which the bonding strength is high. SOLUTION: The lead frame is provided with a frame part 23, a chip- mounting part 25 on which a semiconductor chip 24 is mounted, lead parts 17 arranged in the circumference of the part 25 and connecting bars 30a, 30b, etc., in connection parts used to connect the lead parts 27 and the part 25 to the frame part 23. The semiconductor chip 24 is mounted on the part 25, so as to be sealed with a package 28, a plating treatment is executed to the surface, and the connection parts are cut and worked. The lead parts 27 are formed, in such a way that the extension length of each outer lead part 27b from the package 28 becomes a final length L1 from the beginning, and plating treatment is applied to each tip face 29. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2002261227A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2002261227A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2002261227A3</originalsourceid><addsrcrecordid>eNrjZFD2cXV0UXALcvR1VXDzD1IIdvX1dPb3cwl1DgHyXFzDPJ1deRhY0xJzilN5oTQ3g5Kba4izh25qQX58anFBYnJqXmpJvFeAkYGBkZGZoZGRuaMxUYoAg-ki5Q</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>LEAD FRAME FOR SEMICONDUCTOR DEVICE</title><source>esp@cenet</source><creator>KITAYAMA YOSHITERU</creator><creatorcontrib>KITAYAMA YOSHITERU</creatorcontrib><description>PROBLEM TO BE SOLVED: To provide a lead frame for a semiconductor device, in which a fillet can be formed sufficiently at the tip of an outer lead part, when a soldering operation is performed, and in which the bonding strength is high. SOLUTION: The lead frame is provided with a frame part 23, a chip- mounting part 25 on which a semiconductor chip 24 is mounted, lead parts 17 arranged in the circumference of the part 25 and connecting bars 30a, 30b, etc., in connection parts used to connect the lead parts 27 and the part 25 to the frame part 23. The semiconductor chip 24 is mounted on the part 25, so as to be sealed with a package 28, a plating treatment is executed to the surface, and the connection parts are cut and worked. The lead parts 27 are formed, in such a way that the extension length of each outer lead part 27b from the package 28 becomes a final length L1 from the beginning, and plating treatment is applied to each tip face 29.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2002</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020913&DB=EPODOC&CC=JP&NR=2002261227A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25568,76551</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020913&DB=EPODOC&CC=JP&NR=2002261227A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KITAYAMA YOSHITERU</creatorcontrib><title>LEAD FRAME FOR SEMICONDUCTOR DEVICE</title><description>PROBLEM TO BE SOLVED: To provide a lead frame for a semiconductor device, in which a fillet can be formed sufficiently at the tip of an outer lead part, when a soldering operation is performed, and in which the bonding strength is high. SOLUTION: The lead frame is provided with a frame part 23, a chip- mounting part 25 on which a semiconductor chip 24 is mounted, lead parts 17 arranged in the circumference of the part 25 and connecting bars 30a, 30b, etc., in connection parts used to connect the lead parts 27 and the part 25 to the frame part 23. The semiconductor chip 24 is mounted on the part 25, so as to be sealed with a package 28, a plating treatment is executed to the surface, and the connection parts are cut and worked. The lead parts 27 are formed, in such a way that the extension length of each outer lead part 27b from the package 28 becomes a final length L1 from the beginning, and plating treatment is applied to each tip face 29.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2002</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD2cXV0UXALcvR1VXDzD1IIdvX1dPb3cwl1DgHyXFzDPJ1deRhY0xJzilN5oTQ3g5Kba4izh25qQX58anFBYnJqXmpJvFeAkYGBkZGZoZGRuaMxUYoAg-ki5Q</recordid><startdate>20020913</startdate><enddate>20020913</enddate><creator>KITAYAMA YOSHITERU</creator><scope>EVB</scope></search><sort><creationdate>20020913</creationdate><title>LEAD FRAME FOR SEMICONDUCTOR DEVICE</title><author>KITAYAMA YOSHITERU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2002261227A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2002</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KITAYAMA YOSHITERU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KITAYAMA YOSHITERU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>LEAD FRAME FOR SEMICONDUCTOR DEVICE</title><date>2002-09-13</date><risdate>2002</risdate><abstract>PROBLEM TO BE SOLVED: To provide a lead frame for a semiconductor device, in which a fillet can be formed sufficiently at the tip of an outer lead part, when a soldering operation is performed, and in which the bonding strength is high. SOLUTION: The lead frame is provided with a frame part 23, a chip- mounting part 25 on which a semiconductor chip 24 is mounted, lead parts 17 arranged in the circumference of the part 25 and connecting bars 30a, 30b, etc., in connection parts used to connect the lead parts 27 and the part 25 to the frame part 23. The semiconductor chip 24 is mounted on the part 25, so as to be sealed with a package 28, a plating treatment is executed to the surface, and the connection parts are cut and worked. The lead parts 27 are formed, in such a way that the extension length of each outer lead part 27b from the package 28 becomes a final length L1 from the beginning, and plating treatment is applied to each tip face 29.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_JP2002261227A |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | LEAD FRAME FOR SEMICONDUCTOR DEVICE |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-16T22%3A47%3A42IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KITAYAMA%20YOSHITERU&rft.date=2002-09-13&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJP2002261227A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |