CONTROLLER FOR INTEGRATED CIRCUIT TEST
PROBLEM TO BE SOLVED: To provide a controller for integrated circuit test that allows a highly precise operation test for an integrated circuit to be performed without increasing the number of pins for the output terminal and an input terminal of a tester or the like. SOLUTION: In this controller fo...
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| creator | ASADA YASUNORI |
| description | PROBLEM TO BE SOLVED: To provide a controller for integrated circuit test that allows a highly precise operation test for an integrated circuit to be performed without increasing the number of pins for the output terminal and an input terminal of a tester or the like. SOLUTION: In this controller for integrated circuit test, a test data generating and outputting means 1 inputs test data generating data comprising parallel data values of the number different from the number of the input terminals of the integrated circuit 3 from an LSI tester 4, the means 1 converts the data into a test data comprising parallel data values of the number same to the number of the input terminals to be output to the integrated circuit 3, a test result informing data generating and outputting means 2 inputs test result data comprising parallel data values of the number same to the number of the output terminals output from the output terminals of the integrated circuit 3, and the means 2 converts the data into a test result informing data comprising parallel data values of a prescribed number different from the number of the output terminals to be output to an LSI tester 5. |
| format | Patent |
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SOLUTION: In this controller for integrated circuit test, a test data generating and outputting means 1 inputs test data generating data comprising parallel data values of the number different from the number of the input terminals of the integrated circuit 3 from an LSI tester 4, the means 1 converts the data into a test data comprising parallel data values of the number same to the number of the input terminals to be output to the integrated circuit 3, a test result informing data generating and outputting means 2 inputs test result data comprising parallel data values of the number same to the number of the output terminals output from the output terminals of the integrated circuit 3, and the means 2 converts the data into a test result informing data comprising parallel data values of a prescribed number different from the number of the output terminals to be output to an LSI tester 5.</description><edition>7</edition><language>eng</language><subject>MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>2002</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020621&DB=EPODOC&CC=JP&NR=2002174661A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020621&DB=EPODOC&CC=JP&NR=2002174661A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ASADA YASUNORI</creatorcontrib><title>CONTROLLER FOR INTEGRATED CIRCUIT TEST</title><description>PROBLEM TO BE SOLVED: To provide a controller for integrated circuit test that allows a highly precise operation test for an integrated circuit to be performed without increasing the number of pins for the output terminal and an input terminal of a tester or the like. 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| subjects | MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING |
| title | CONTROLLER FOR INTEGRATED CIRCUIT TEST |
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