METHOD FOR MANUFACTURING FLASH MEMORY ELEMENT

PROBLEM TO BE SOLVED: To solve the problem where the distance between adjacent gate electrodes decreases when a flash memory is highly integrated and the film thickness of tungsten silicide becomes nonuniform, signal transmission delay occurs, and disconnection failure occurs in succeeding heat trea...

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Hauptverfasser: BOKU HEISHU, KIN KIJUN, SHIN EIKI, RI KIRETSU
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creator BOKU HEISHU
KIN KIJUN
SHIN EIKI
RI KIRETSU
description PROBLEM TO BE SOLVED: To solve the problem where the distance between adjacent gate electrodes decreases when a flash memory is highly integrated and the film thickness of tungsten silicide becomes nonuniform, signal transmission delay occurs, and disconnection failure occurs in succeeding heat treatment due to residual ground insulation film when the tungsten silicide for select gates is deposited in this state. SOLUTION: A reflection prevention film 27 made of a protection film 26 and an oxide nitride film is formed on a control gate 25, a source is formed by ion implantation, then the sidewall of the control gate is oxidized and at the same time a thick oxide film 30 is grown on a source region 29A, further a nitride film is formed on both sidewalls of the gate electrode, and then a drain region is opened and ions are implanted. Finally, a photosensitive mask is eliminated, a select gate oxide film 33 is formed on the exposed substrate, and a select gate made of layers 34 and 35 is formed on it.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2001196479A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2001196479A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2001196479A3</originalsourceid><addsrcrecordid>eNrjZND1dQ3x8HdRcPMPUvB19At1c3QOCQ3y9HNXcPNxDPZQ8HX19Q-KVHD1cfV19QvhYWBNS8wpTuWF0twMSm6uIc4euqkF-fGpxQWJyal5qSXxXgFGBgaGhpZmJuaWjsZEKQIADX4mAw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>METHOD FOR MANUFACTURING FLASH MEMORY ELEMENT</title><source>esp@cenet</source><creator>BOKU HEISHU ; KIN KIJUN ; SHIN EIKI ; RI KIRETSU</creator><creatorcontrib>BOKU HEISHU ; KIN KIJUN ; SHIN EIKI ; RI KIRETSU</creatorcontrib><description>PROBLEM TO BE SOLVED: To solve the problem where the distance between adjacent gate electrodes decreases when a flash memory is highly integrated and the film thickness of tungsten silicide becomes nonuniform, signal transmission delay occurs, and disconnection failure occurs in succeeding heat treatment due to residual ground insulation film when the tungsten silicide for select gates is deposited in this state. SOLUTION: A reflection prevention film 27 made of a protection film 26 and an oxide nitride film is formed on a control gate 25, a source is formed by ion implantation, then the sidewall of the control gate is oxidized and at the same time a thick oxide film 30 is grown on a source region 29A, further a nitride film is formed on both sidewalls of the gate electrode, and then a drain region is opened and ions are implanted. Finally, a photosensitive mask is eliminated, a select gate oxide film 33 is formed on the exposed substrate, and a select gate made of layers 34 and 35 is formed on it.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2001</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20010719&amp;DB=EPODOC&amp;CC=JP&amp;NR=2001196479A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25546,76297</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20010719&amp;DB=EPODOC&amp;CC=JP&amp;NR=2001196479A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BOKU HEISHU</creatorcontrib><creatorcontrib>KIN KIJUN</creatorcontrib><creatorcontrib>SHIN EIKI</creatorcontrib><creatorcontrib>RI KIRETSU</creatorcontrib><title>METHOD FOR MANUFACTURING FLASH MEMORY ELEMENT</title><description>PROBLEM TO BE SOLVED: To solve the problem where the distance between adjacent gate electrodes decreases when a flash memory is highly integrated and the film thickness of tungsten silicide becomes nonuniform, signal transmission delay occurs, and disconnection failure occurs in succeeding heat treatment due to residual ground insulation film when the tungsten silicide for select gates is deposited in this state. SOLUTION: A reflection prevention film 27 made of a protection film 26 and an oxide nitride film is formed on a control gate 25, a source is formed by ion implantation, then the sidewall of the control gate is oxidized and at the same time a thick oxide film 30 is grown on a source region 29A, further a nitride film is formed on both sidewalls of the gate electrode, and then a drain region is opened and ions are implanted. Finally, a photosensitive mask is eliminated, a select gate oxide film 33 is formed on the exposed substrate, and a select gate made of layers 34 and 35 is formed on it.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2001</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZND1dQ3x8HdRcPMPUvB19At1c3QOCQ3y9HNXcPNxDPZQ8HX19Q-KVHD1cfV19QvhYWBNS8wpTuWF0twMSm6uIc4euqkF-fGpxQWJyal5qSXxXgFGBgaGhpZmJuaWjsZEKQIADX4mAw</recordid><startdate>20010719</startdate><enddate>20010719</enddate><creator>BOKU HEISHU</creator><creator>KIN KIJUN</creator><creator>SHIN EIKI</creator><creator>RI KIRETSU</creator><scope>EVB</scope></search><sort><creationdate>20010719</creationdate><title>METHOD FOR MANUFACTURING FLASH MEMORY ELEMENT</title><author>BOKU HEISHU ; KIN KIJUN ; SHIN EIKI ; RI KIRETSU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2001196479A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2001</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>BOKU HEISHU</creatorcontrib><creatorcontrib>KIN KIJUN</creatorcontrib><creatorcontrib>SHIN EIKI</creatorcontrib><creatorcontrib>RI KIRETSU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BOKU HEISHU</au><au>KIN KIJUN</au><au>SHIN EIKI</au><au>RI KIRETSU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD FOR MANUFACTURING FLASH MEMORY ELEMENT</title><date>2001-07-19</date><risdate>2001</risdate><abstract>PROBLEM TO BE SOLVED: To solve the problem where the distance between adjacent gate electrodes decreases when a flash memory is highly integrated and the film thickness of tungsten silicide becomes nonuniform, signal transmission delay occurs, and disconnection failure occurs in succeeding heat treatment due to residual ground insulation film when the tungsten silicide for select gates is deposited in this state. SOLUTION: A reflection prevention film 27 made of a protection film 26 and an oxide nitride film is formed on a control gate 25, a source is formed by ion implantation, then the sidewall of the control gate is oxidized and at the same time a thick oxide film 30 is grown on a source region 29A, further a nitride film is formed on both sidewalls of the gate electrode, and then a drain region is opened and ions are implanted. Finally, a photosensitive mask is eliminated, a select gate oxide film 33 is formed on the exposed substrate, and a select gate made of layers 34 and 35 is formed on it.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title METHOD FOR MANUFACTURING FLASH MEMORY ELEMENT
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