SEMICONDUCTOR INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To reduce the peak value of diode recovery current by providing respective first and second voltage applying means which apply arbitrary voltage of not higher than prescribed one to first and second switching means. SOLUTION: A first voltage applying means which applies an arbi...

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Bibliographische Detailangaben
Hauptverfasser: MIYAWAKI TORU, KIMURA HIDEKI, KOBAYASHI HIROYUKI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To reduce the peak value of diode recovery current by providing respective first and second voltage applying means which apply arbitrary voltage of not higher than prescribed one to first and second switching means. SOLUTION: A first voltage applying means which applies an arbitrary voltage of not higher than prescribed voltage to a first switching means and a second voltage applying means which applies an arbitrary voltage of not higher than prescribed one to a second switching means are installed. Namely, when N-channel MOS transistors MN1 and MN4 are switched to be on and N-channel MOS transistors MN2 and MN3 to be off, switches SW1 and SW4 are opened before the start of a switching operation, and the application of voltage between the source/gate of the N-channel MOS transistors MN1 and MN4 is started in such a sate. Then, the switches SW1 and SW4 are connected immediately after the voltage application. Voltage between the source and the gate of the N-channel MOS transistors MN1 and MN4 is boosted stepwise.