ELECTRIC CONNECTION METHOD FOR INSULTED GATE BIPOLAR TRANSISTOR CHIP FITTED TO INTEGRATED CIRCUIT WAFER

ELECTRIC CONNECTION METHOD FOR INSULTED GATE BIPOLAR TRANSISTOR CHIP FITTED TO INTEGRATED CIRCUIT WAFER

PROBLEM TO BE SOLVED: To provide a method for electrically connecting an insulated gate bipolar transistor chip fitted to an integrated circuit wafer. SOLUTION: An emitter electrode and a gate control electrode 26 and 28 are jointed to facing connection positions 14 and 16 of a chip. At least some o...

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Hauptverfasser: CHANGEY NICOLAS, RANCHY ERIC, CROUZY SOPHIE, PETITBON ALAIN
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator CHANGEY NICOLAS
RANCHY ERIC
CROUZY SOPHIE
PETITBON ALAIN
description PROBLEM TO BE SOLVED: To provide a method for electrically connecting an insulated gate bipolar transistor chip fitted to an integrated circuit wafer. SOLUTION: An emitter electrode and a gate control electrode 26 and 28 are jointed to facing connection positions 14 and 16 of a chip. At least some of the emitter electrodes 26 are manufactured into a single pant on one of large surfaces, in a form of conductive-material plate 20 comprising a protruding part which forms a connection pad jointed to a corresponding connection position.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title ELECTRIC CONNECTION METHOD FOR INSULTED GATE BIPOLAR TRANSISTOR CHIP FITTED TO INTEGRATED CIRCUIT WAFER
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