CLOCK GENERATING CIRCUIT

PROBLEM TO BE SOLVED: To realize a clock-generating circuit that realizes spread spectrum processing for a clock signal and reduces the radiation of electromagnetic waves by shifting only slightly an operating clock signal of a semiconductor device. SOLUTION: A phase comparator 10 of a PLL circuit compares a phase of a received reference clock signal SIN with a phase of a frequency division signal SD from a frequency divider 50, outputs an up-down signal SUD in response to a phase difference of the signals, a low-pass filter 20 eliminates a high frequency component of the up-down signal SUD and provides an output of a signal SL, consisting of low frequency components. A DC amplifier 30a generates a control signal SV resulting from adding a bias signal, in response to a frequency control signal SC1 to the signal SL and gives the signal SV to a VCO 40, the VCO 40 oscillates at a frequency set by the control signal SV and generates a clock signal CK0, whose frequency is transited in response to the frequency control signal SC1 and gives it to a semiconductor device as an operating clock signal.