CIRCUITO DI COMANDO DI AMPLIFICATORE DI RILEVAMENTO DA USARSI IN UN DISPOSITIVO DI MEMORIA

A sense amplifier driver for memory device includes: a first inverter for inverting sensing clocks; a second inverter for reinverting the outputs of the first inverter; time delaying resistances disposed between the gates of the second inverter in parallel with the output terminals of the second inv...

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description A sense amplifier driver for memory device includes: a first inverter for inverting sensing clocks; a second inverter for reinverting the outputs of the first inverter; time delaying resistances disposed between the gates of the second inverter in parallel with the output terminals of the second inverter so that they can be turned on successively at different times in response to the outputs of the second inverter; a third inverter consisting of n-channel MOS transistors having drains commonly connected to the low potential terminal of the sense amplifier; and pull-down device for pulling down to the ground potential the gate voltage of at least an n-channel MOS transistor disposed within the third inverter. According to the present invention, the peak current can be reduced, and the operating power can be kept to the minimum.
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According to the present invention, the peak current can be reduced, and the operating power can be kept to the minimum.</description><edition>6</edition><language>ita</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>1995</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19950126&amp;DB=EPODOC&amp;CC=IT&amp;NR=1248660B$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19950126&amp;DB=EPODOC&amp;CC=IT&amp;NR=1248660B$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SEO SEUNGMO</creatorcontrib><title>CIRCUITO DI COMANDO DI AMPLIFICATORE DI RILEVAMENTO DA USARSI IN UN DISPOSITIVO DI MEMORIA</title><description>A sense amplifier driver for memory device includes: a first inverter for inverting sensing clocks; a second inverter for reinverting the outputs of the first inverter; time delaying resistances disposed between the gates of the second inverter in parallel with the output terminals of the second inverter so that they can be turned on successively at different times in response to the outputs of the second inverter; a third inverter consisting of n-channel MOS transistors having drains commonly connected to the low potential terminal of the sense amplifier; and pull-down device for pulling down to the ground potential the gate voltage of at least an n-channel MOS transistor disposed within the third inverter. According to the present invention, the peak current can be reduced, and the operating power can be kept to the minimum.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1995</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZIhy9gxyDvUM8Vdw8VRw9vd19HMBMx19A3w83TydHUP8g1xBAkGePq5hjr6ufiCljgqhwY5BwZ4Knn4KoX5A6eAA_2DPEM8wsF5fV1__IE9HHgbWtMSc4lReKM3NIO_mGuLsoZtakB-fWlyQmJyal1oS7xliaGRiYWZm4GRMWAUAasIwxw</recordid><startdate>19950126</startdate><enddate>19950126</enddate><creator>SEO SEUNGMO</creator><scope>EVB</scope></search><sort><creationdate>19950126</creationdate><title>CIRCUITO DI COMANDO DI AMPLIFICATORE DI RILEVAMENTO DA USARSI IN UN DISPOSITIVO DI MEMORIA</title><author>SEO SEUNGMO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_IT1248660B3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>ita</language><creationdate>1995</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>SEO SEUNGMO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SEO SEUNGMO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>CIRCUITO DI COMANDO DI AMPLIFICATORE DI RILEVAMENTO DA USARSI IN UN DISPOSITIVO DI MEMORIA</title><date>1995-01-26</date><risdate>1995</risdate><abstract>A sense amplifier driver for memory device includes: a first inverter for inverting sensing clocks; a second inverter for reinverting the outputs of the first inverter; time delaying resistances disposed between the gates of the second inverter in parallel with the output terminals of the second inverter so that they can be turned on successively at different times in response to the outputs of the second inverter; a third inverter consisting of n-channel MOS transistors having drains commonly connected to the low potential terminal of the sense amplifier; and pull-down device for pulling down to the ground potential the gate voltage of at least an n-channel MOS transistor disposed within the third inverter. According to the present invention, the peak current can be reduced, and the operating power can be kept to the minimum.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record>
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subjects INFORMATION STORAGE
PHYSICS
STATIC STORES
title CIRCUITO DI COMANDO DI AMPLIFICATORE DI RILEVAMENTO DA USARSI IN UN DISPOSITIVO DI MEMORIA
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