DISPOSITIVO DI MEMORIA MOS DI TIPO DINAMICO
A dynamic type MOS memory device comprises a plurality of word lines, selecting switch MOSFETs which are disposed in correspondence with the respective word lines, a control circuit for controlling the selecting switch MOSFETs, MOSFETs which are disposed between the respective word lines and the gro...
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creator | KAZIGAYA KAZUHIKO MATSUMOTO TETSUROU |
description | A dynamic type MOS memory device comprises a plurality of word lines, selecting switch MOSFETs which are disposed in correspondence with the respective word lines, a control circuit for controlling the selecting switch MOSFETs, MOSFETs which are disposed between the respective word lines and the ground potential and which are used as resistance means, and an inverter circuit which receives timing signals to be applied to input side electrodes of the selecting switch MOSFETs and which supplies the MOSFETs as the resistance means with control signals for bringing these MOSFETs into "off" states. The timing signal is brought into a supply voltage level substantially in synchronism with the completion of the operation of the control circuit. Accordingly, a dynamic type MOS memory device whose operating speed has been rendered high can be provided. |
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The timing signal is brought into a supply voltage level substantially in synchronism with the completion of the operation of the control circuit. Accordingly, a dynamic type MOS memory device whose operating speed has been rendered high can be provided.</description><edition>4</edition><language>ita</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>1986</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19861224&DB=EPODOC&CC=IT&NR=1151660B$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19861224&DB=EPODOC&CC=IT&NR=1151660B$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KAZIGAYA KAZUHIKO</creatorcontrib><creatorcontrib>MATSUMOTO TETSUROU</creatorcontrib><title>DISPOSITIVO DI MEMORIA MOS DI TIPO DINAMICO</title><description>A dynamic type MOS memory device comprises a plurality of word lines, selecting switch MOSFETs which are disposed in correspondence with the respective word lines, a control circuit for controlling the selecting switch MOSFETs, MOSFETs which are disposed between the respective word lines and the ground potential and which are used as resistance means, and an inverter circuit which receives timing signals to be applied to input side electrodes of the selecting switch MOSFETs and which supplies the MOSFETs as the resistance means with control signals for bringing these MOSFETs into "off" states. The timing signal is brought into a supply voltage level substantially in synchronism with the completion of the operation of the control circuit. Accordingly, a dynamic type MOS memory device whose operating speed has been rendered high can be provided.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1986</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNB28QwO8A_2DPEM81dw8VTwdfX1D_J0VPD1DwZxQzwDQMJ-jr6ezv48DKxpiTnFqbxQmptB3s01xNlDN7UgPz61uCAxOTUvtSTeM8TQ0NTQzMzAyZiwCgDeCiQA</recordid><startdate>19861224</startdate><enddate>19861224</enddate><creator>KAZIGAYA KAZUHIKO</creator><creator>MATSUMOTO TETSUROU</creator><scope>EVB</scope></search><sort><creationdate>19861224</creationdate><title>DISPOSITIVO DI MEMORIA MOS DI TIPO DINAMICO</title><author>KAZIGAYA KAZUHIKO ; MATSUMOTO TETSUROU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_IT1151660B3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>ita</language><creationdate>1986</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>KAZIGAYA KAZUHIKO</creatorcontrib><creatorcontrib>MATSUMOTO TETSUROU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KAZIGAYA KAZUHIKO</au><au>MATSUMOTO TETSUROU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DISPOSITIVO DI MEMORIA MOS DI TIPO DINAMICO</title><date>1986-12-24</date><risdate>1986</risdate><abstract>A dynamic type MOS memory device comprises a plurality of word lines, selecting switch MOSFETs which are disposed in correspondence with the respective word lines, a control circuit for controlling the selecting switch MOSFETs, MOSFETs which are disposed between the respective word lines and the ground potential and which are used as resistance means, and an inverter circuit which receives timing signals to be applied to input side electrodes of the selecting switch MOSFETs and which supplies the MOSFETs as the resistance means with control signals for bringing these MOSFETs into "off" states. The timing signal is brought into a supply voltage level substantially in synchronism with the completion of the operation of the control circuit. Accordingly, a dynamic type MOS memory device whose operating speed has been rendered high can be provided.</abstract><edition>4</edition><oa>free_for_read</oa></addata></record> |
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subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
title | DISPOSITIVO DI MEMORIA MOS DI TIPO DINAMICO |
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