Serial-accessed memory data accessing circuit involving low operating current, and method thereof

A SAM data accessing circuit and a method thereof in which, at the falling edge of a serial counting clock signal SC occurring at one and half cycles before data output cycles, the data is sensed from a SAM port memory. The sensed data is then stored in a first section of a two-stage buffer. At the...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: SEUNGMO SEO
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!