Circuit arrangement for testing a semiconductor store by means of parallel tests with different test bit patterns

PCT No. PCT/DE91/00685 Sec. 371 Date Mar. 5, 1993 Sec. 102(e) Date Mar. 5, 1993 PCT Filed Aug. 29, 1991 PCT Pub. No. WO92/04717 PCT Pub. Date Mar. 19, 1992.A circuit arrangement for testing a semiconductor memory, in which various test bit patterns can be written into a register (REG) and into memor...

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1. Verfasser:	BERNHARD LUSTIG DR
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES STATIC STORES TESTING
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