A TRANSISTOR ARRANGEMENT HAVING LOW CHARGE STORAGE

A TRANSISTOR ARRANGEMENT HAVING LOW CHARGE STORAGE

A transistor arrangement having a relatively low charge storage period including an N.P.N. transistor having the base thereof connected to the emitter of a P.N.P. transistor and to an input terminal, the collector thereof connected to the base of the P.N.P. transistor and to an electrical supply ter...

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Bibliographische Detailangaben
1. Verfasser: RING A E
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
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Zusammenfassung:A transistor arrangement having a relatively low charge storage period including an N.P.N. transistor having the base thereof connected to the emitter of a P.N.P. transistor and to an input terminal, the collector thereof connected to the base of the P.N.P. transistor and to an electrical supply terminal, and the emitter thereof connected to the collector of the P.N.P. transistor and to another electrical supply terminal.