SEMICONDUCTOR DEVICE HAVING FEATURES TO PREVENT REVERSE ENGINEERING
It is desirable to design and manufacture electronic chips that are resistant to modern reverse engineering techniques. Disclosed is a method and device that allows for the design of chips that are difficult to reverse engineer using modern teardown techniques. The disclosed device uses devices havi...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | chi ; eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | THACKER, III, WILLIAM ELI HOKE, MICHAEL CLINTON TENCZAR, ROBERT FRANCIS |
description | It is desirable to design and manufacture electronic chips that are resistant to modern reverse engineering techniques. Disclosed is a method and device that allows for the design of chips that are difficult to reverse engineer using modern teardown techniques. The disclosed device uses devices having the same geometry but different voltage levels to create different logic devices. Alternatively, the disclosed uses devices having different geometries and the same operating characteristics. Also disclosed is a method of designing a chip using these devices. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_HK1209914A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>HK1209914A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_HK1209914A13</originalsourceid><addsrcrecordid>eNrjZHAOdvX1dPb3cwl1DvEPUnBxDfN0dlXwcAzz9HNXcHN1DAkNcg1WCPFXCAhyDXP1C1EAUUHBrgqufu6efq6uQUB1PAysaYk5xam8UJqbAagzxNlDN7UgPz61uCAxOTUvtSTew9vQyMDS0tDE0dCYCCUA-2orWw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE HAVING FEATURES TO PREVENT REVERSE ENGINEERING</title><source>esp@cenet</source><creator>THACKER, III, WILLIAM ELI ; HOKE, MICHAEL CLINTON ; TENCZAR, ROBERT FRANCIS</creator><creatorcontrib>THACKER, III, WILLIAM ELI ; HOKE, MICHAEL CLINTON ; TENCZAR, ROBERT FRANCIS</creatorcontrib><description>It is desirable to design and manufacture electronic chips that are resistant to modern reverse engineering techniques. Disclosed is a method and device that allows for the design of chips that are difficult to reverse engineer using modern teardown techniques. The disclosed device uses devices having the same geometry but different voltage levels to create different logic devices. Alternatively, the disclosed uses devices having different geometries and the same operating characteristics. Also disclosed is a method of designing a chip using these devices.</description><language>chi ; eng</language><subject>ELECTRICITY</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160408&DB=EPODOC&CC=HK&NR=1209914A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76419</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160408&DB=EPODOC&CC=HK&NR=1209914A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>THACKER, III, WILLIAM ELI</creatorcontrib><creatorcontrib>HOKE, MICHAEL CLINTON</creatorcontrib><creatorcontrib>TENCZAR, ROBERT FRANCIS</creatorcontrib><title>SEMICONDUCTOR DEVICE HAVING FEATURES TO PREVENT REVERSE ENGINEERING</title><description>It is desirable to design and manufacture electronic chips that are resistant to modern reverse engineering techniques. Disclosed is a method and device that allows for the design of chips that are difficult to reverse engineer using modern teardown techniques. The disclosed device uses devices having the same geometry but different voltage levels to create different logic devices. Alternatively, the disclosed uses devices having different geometries and the same operating characteristics. Also disclosed is a method of designing a chip using these devices.</description><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHAOdvX1dPb3cwl1DvEPUnBxDfN0dlXwcAzz9HNXcHN1DAkNcg1WCPFXCAhyDXP1C1EAUUHBrgqufu6efq6uQUB1PAysaYk5xam8UJqbAagzxNlDN7UgPz61uCAxOTUvtSTew9vQyMDS0tDE0dCYCCUA-2orWw</recordid><startdate>20160408</startdate><enddate>20160408</enddate><creator>THACKER, III, WILLIAM ELI</creator><creator>HOKE, MICHAEL CLINTON</creator><creator>TENCZAR, ROBERT FRANCIS</creator><scope>EVB</scope></search><sort><creationdate>20160408</creationdate><title>SEMICONDUCTOR DEVICE HAVING FEATURES TO PREVENT REVERSE ENGINEERING</title><author>THACKER, III, WILLIAM ELI ; HOKE, MICHAEL CLINTON ; TENCZAR, ROBERT FRANCIS</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_HK1209914A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2016</creationdate><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>THACKER, III, WILLIAM ELI</creatorcontrib><creatorcontrib>HOKE, MICHAEL CLINTON</creatorcontrib><creatorcontrib>TENCZAR, ROBERT FRANCIS</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>THACKER, III, WILLIAM ELI</au><au>HOKE, MICHAEL CLINTON</au><au>TENCZAR, ROBERT FRANCIS</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE HAVING FEATURES TO PREVENT REVERSE ENGINEERING</title><date>2016-04-08</date><risdate>2016</risdate><abstract>It is desirable to design and manufacture electronic chips that are resistant to modern reverse engineering techniques. Disclosed is a method and device that allows for the design of chips that are difficult to reverse engineer using modern teardown techniques. The disclosed device uses devices having the same geometry but different voltage levels to create different logic devices. Alternatively, the disclosed uses devices having different geometries and the same operating characteristics. Also disclosed is a method of designing a chip using these devices.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | chi ; eng |
recordid | cdi_epo_espacenet_HK1209914A1 |
source | esp@cenet |
subjects | ELECTRICITY |
title | SEMICONDUCTOR DEVICE HAVING FEATURES TO PREVENT REVERSE ENGINEERING |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-07T23%3A06%3A01IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=THACKER,%20III,%20WILLIAM%20ELI&rft.date=2016-04-08&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EHK1209914A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |