An efficient method for VLSI implementation of useful neural network activation functions

A neural inference chip is provided, including at least one neural inference core. The at least one neural inference core is adapted to apply a plurality of synaptic weights to a plurality of input activations to produce a plurality of intermediate outputs. The at least one neural inference core com...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Andrew Stephen Cassidy, John Vernon Arthur, Pallab Datta, Jennifer Klamo, Steven Kyle Esser, Rathinakumar Appuswamy, Filipp Akopyan, Myron D Flickner, Jun Sawada, Dharmendra S Modha, Carlos Ortega Otero, Brian Seisho Taba
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS COMPUTING COUNTING PHYSICS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!