High durability solder terminals
An electronic device package includes a lower surface for conducting electronic signals, a first solder bond pad having a first size disposed on the lower surface, and a plurality of second solder bond pads having second sizes smaller than the first size disposed on the lower surface and surrounding...
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creator | Toru Yamaji Yuji Yashiro |
description | An electronic device package includes a lower surface for conducting electronic signals, a first solder bond pad having a first size disposed on the lower surface, and a plurality of second solder bond pads having second sizes smaller than the first size disposed on the lower surface and surrounding the first solder bond pad. |
format | Patent |
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BASIC ELECTRONIC CIRCUITRY ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; RESONATORS ; SEMICONDUCTOR DEVICES</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221221&DB=EPODOC&CC=GB&NR=2583552B$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20221221&DB=EPODOC&CC=GB&NR=2583552B$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Toru Yamaji</creatorcontrib><creatorcontrib>Yuji Yashiro</creatorcontrib><title>High durability solder terminals</title><description>An electronic device package includes a lower surface for conducting electronic signals, a first solder bond pad having a first size disposed on the lower surface, and a plurality of second solder bond pads having second sizes smaller than the first size disposed on the lower surface and surrounding the first solder bond pad.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>RESONATORS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFDwyEzPUEgpLUpMyszJLKlUKM7PSUktUihJLcrNzEvMKeZhYE0DUqm8UJqbQd7NNcTZQze1ID8-tbggMTk1L7Uk3t3JyNTC2NTUyMmYsAoA1xEkog</recordid><startdate>20221221</startdate><enddate>20221221</enddate><creator>Toru Yamaji</creator><creator>Yuji Yashiro</creator><scope>EVB</scope></search><sort><creationdate>20221221</creationdate><title>High durability solder terminals</title><author>Toru Yamaji ; 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subjects | BASIC ELECTRIC ELEMENTS BASIC ELECTRONIC CIRCUITRY CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS RESONATORS SEMICONDUCTOR DEVICES |
title | High durability solder terminals |
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