Electronic circuit having serial latch scan chains

Disclosed is an electronic circuit 10 with latch scan chains 12, the circuit has a built-in test structure 14, generation means 16 that simultaneously generates scan-in data for each of the scan chains, and interception means 18 that intercepts test lines 20 of the scan chains. The test lines having...

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Bibliographische Detailangaben
Hauptverfasser: CEDRIC LICHTENAU, JENS KUENZER, TILMAN GLOEKLER, ANDREAS KOENIG
Format: Patent
Sprache:eng
Schlagworte:
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