Bipolar transistor comprising a raised collector pedestal for reduced capacitance
A heterojunction bipolar transistor 100 and a method of forming the heterojunction bipolar transistor with a raised collector pedestal 125 in reduced dimension for reduced base-collector junction capacitance. The raised collector pedestal 125 is on the top surface of a substrate 121, 120, 101 and ex...
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Format: | Patent |
Sprache: | eng |
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