Cache coherency between a CPU cache hierarchy and a graphics cache hierarchy

A processor 101, such as a central processing unit (CPU), is in a cache coherency domain with a first set of coherency rules 109. A graphics device 105, such as a graphics processing unit (GPU), is in a different coherency domain 111 with a second set of coherency rules. The processor has a level 1...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	ATLUG KOKER, ARIEL BERKOVITS, OPER KAHN, ZEEV OFFEN, THOMAS A PIAZZA, ROBERT L FARRELL
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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