Technique to share information among different cache coherency domains

A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches used by one or more processing cores to store or read information, which may be accessed by one or more processing cores in a manner that d...

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Hauptverfasser: ARIEL BERKOVITS, OPER KAHN, ZEEV OFFEN, THOMAS PIAZZA, ALTUG KOKER, ROBERT L FARRELL
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creator ARIEL BERKOVITS
OPER KAHN
ZEEV OFFEN
THOMAS PIAZZA
ALTUG KOKER
ROBERT L FARRELL
description A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches used by one or more processing cores to store or read information, which may be accessed by one or more processing cores in a manner that does not affect programming and coherency piles pertaining to the graphics device.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_GB2471786A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>GB2471786A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_GB2471786A3</originalsourceid><addsrcrecordid>eNqFyj0KAjEQhuE0FqKewbmAhT-4tiquHmD7ZZj9YgJmZk1i4e1FsLd6eeCduraDBI3PF6galcAZFNVbTlyjKXEyvdMQvUeGVhKWABILX8qbBksctczdxPOjYPHrzC3bS3e-rTBajzKyQFH762mza9bNYX_c_j8-hjEzCQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Technique to share information among different cache coherency domains</title><source>esp@cenet</source><creator>ARIEL BERKOVITS ; OPER KAHN ; ZEEV OFFEN ; THOMAS PIAZZA ; ALTUG KOKER ; ROBERT L FARRELL</creator><creatorcontrib>ARIEL BERKOVITS ; OPER KAHN ; ZEEV OFFEN ; THOMAS PIAZZA ; ALTUG KOKER ; ROBERT L FARRELL</creatorcontrib><description>A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches used by one or more processing cores to store or read information, which may be accessed by one or more processing cores in a manner that does not affect programming and coherency piles pertaining to the graphics device.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20110112&amp;DB=EPODOC&amp;CC=GB&amp;NR=2471786A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20110112&amp;DB=EPODOC&amp;CC=GB&amp;NR=2471786A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ARIEL BERKOVITS</creatorcontrib><creatorcontrib>OPER KAHN</creatorcontrib><creatorcontrib>ZEEV OFFEN</creatorcontrib><creatorcontrib>THOMAS PIAZZA</creatorcontrib><creatorcontrib>ALTUG KOKER</creatorcontrib><creatorcontrib>ROBERT L FARRELL</creatorcontrib><title>Technique to share information among different cache coherency domains</title><description>A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches used by one or more processing cores to store or read information, which may be accessed by one or more processing cores in a manner that does not affect programming and coherency piles pertaining to the graphics device.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqFyj0KAjEQhuE0FqKewbmAhT-4tiquHmD7ZZj9YgJmZk1i4e1FsLd6eeCduraDBI3PF6galcAZFNVbTlyjKXEyvdMQvUeGVhKWABILX8qbBksctczdxPOjYPHrzC3bS3e-rTBajzKyQFH762mza9bNYX_c_j8-hjEzCQ</recordid><startdate>20110112</startdate><enddate>20110112</enddate><creator>ARIEL BERKOVITS</creator><creator>OPER KAHN</creator><creator>ZEEV OFFEN</creator><creator>THOMAS PIAZZA</creator><creator>ALTUG KOKER</creator><creator>ROBERT L FARRELL</creator><scope>EVB</scope></search><sort><creationdate>20110112</creationdate><title>Technique to share information among different cache coherency domains</title><author>ARIEL BERKOVITS ; OPER KAHN ; ZEEV OFFEN ; THOMAS PIAZZA ; ALTUG KOKER ; ROBERT L FARRELL</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_GB2471786A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>ARIEL BERKOVITS</creatorcontrib><creatorcontrib>OPER KAHN</creatorcontrib><creatorcontrib>ZEEV OFFEN</creatorcontrib><creatorcontrib>THOMAS PIAZZA</creatorcontrib><creatorcontrib>ALTUG KOKER</creatorcontrib><creatorcontrib>ROBERT L FARRELL</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ARIEL BERKOVITS</au><au>OPER KAHN</au><au>ZEEV OFFEN</au><au>THOMAS PIAZZA</au><au>ALTUG KOKER</au><au>ROBERT L FARRELL</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Technique to share information among different cache coherency domains</title><date>2011-01-12</date><risdate>2011</risdate><abstract>A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches used by one or more processing cores to store or read information, which may be accessed by one or more processing cores in a manner that does not affect programming and coherency piles pertaining to the graphics device.</abstract><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Technique to share information among different cache coherency domains
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-20T09%3A04%3A33IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=ARIEL%20BERKOVITS&rft.date=2011-01-12&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EGB2471786A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true