Using dedicated read and write slots in a memory controller

Using dedicated read and write slots in a memory controller

A system comprises a memory controller which schedules read commands via a first dedicated command slot and write commands and data to dedicated second or third command slots. These slots, or logical channels, are used in conjunction with a scheduling system which queues read and write commands, mak...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: ANUPAM MOHANTY, RAMESH SUBASHCHANDRABOSE, RAJAT AGARWAL
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Beschreibung
Zusammenfassung:A system comprises a memory controller which schedules read commands via a first dedicated command slot and write commands and data to dedicated second or third command slots. These slots, or logical channels, are used in conjunction with a scheduling system which queues read and write commands, making use of logic to resolve any conflicts in a manner akin to an arbitration circuit. The system is designed so that there are no idle frames when write commands are issued and is particular suitable for systems in which fully buffered DIMMs are used.