microprocessor design system
A processor, suitable for embedded applications, is disclosed comprising a processor core 110 and peripheral devices. One of these devices is a memory management unit 111 allowing the designer of an application specific integrated circuit (ASIC) embodying the processor to tailor the interface 203 an...
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creator | TIMOTHY JAMES RAMSDALE ALISTAIR GUY MORFEY RICHARD PENRY WILLIAMS |
description | A processor, suitable for embedded applications, is disclosed comprising a processor core 110 and peripheral devices. One of these devices is a memory management unit 111 allowing the designer of an application specific integrated circuit (ASIC) embodying the processor to tailor the interface 203 and 205 between the processor and memory devices 113 and 114 according to the intended memory configuration of the processor. Also disclosed is a computer-aided (CAD) method of designing such a processor, allowing a user to specify at descriptor level a Harvard or von Neuman memory interface between the processor and memory devices. |
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Also disclosed is a computer-aided (CAD) method of designing such a processor, allowing a user to specify at descriptor level a Harvard or von Neuman memory interface between the processor and memory devices.</description><edition>7</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2003</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20030611&DB=EPODOC&CC=GB&NR=2382889A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20030611&DB=EPODOC&CC=GB&NR=2382889A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TIMOTHY JAMES RAMSDALE</creatorcontrib><creatorcontrib>ALISTAIR GUY MORFEY</creatorcontrib><creatorcontrib>RICHARD PENRY WILLIAMS</creatorcontrib><title>microprocessor design system</title><description>A processor, suitable for embedded applications, is disclosed comprising a processor core 110 and peripheral devices. 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One of these devices is a memory management unit 111 allowing the designer of an application specific integrated circuit (ASIC) embodying the processor to tailor the interface 203 and 205 between the processor and memory devices 113 and 114 according to the intended memory configuration of the processor. Also disclosed is a computer-aided (CAD) method of designing such a processor, allowing a user to specify at descriptor level a Harvard or von Neuman memory interface between the processor and memory devices.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | microprocessor design system |
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