PROCEDE ET DISPOSITIF D'AMPLIFICATION EN MODE COMMUN AUTOPOLARISE ET AUTOREGULE
Le dispositif d'amplification comporte un étage d'amplification (TRSC) ayant un transistor d'amplification à transconductance (103) et une borne de sortie (120). Un circuit de polarisation (MC) est configuré pour polariser en mode commun la borne de sortie (120) à un potentiel de pola...
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creator | NICOLAS, SANDRINE AYRAUD, MICHEL |
description | Le dispositif d'amplification comporte un étage d'amplification (TRSC) ayant un transistor d'amplification à transconductance (103) et une borne de sortie (120). Un circuit de polarisation (MC) est configuré pour polariser en mode commun la borne de sortie (120) à un potentiel de polarisation obtenu à partir d'une tension présente entre la grille et la source dudit transistor d'amplification (103), et pour compenser des variations parasites de ladite tension présente entre la grille et la source dudit transistor d'amplification (103).
An amplification device includes an amplification stage having a transconductance amplification transistor and an output terminal. A biasing circuit is configured to bias in common mode the output terminal to a bias potential obtained on the basis of a voltage present between the gate and the source of the amplification transistor, and to compensate for parasitic variations of the voltage present between the gate and the source of the amplification transistor. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_FR3059492A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>FR3059492A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_FR3059492A13</originalsourceid><addsrcrecordid>eNrjZPAPCPJ3dnVxVXANUXDxDA7wD_YM8XRTcFF39A3w8XTzdHYM8fT3U3D1U_D1B6py9vf1DfVTcAwN8Q_w93EM8gwG6wTxg1zdQ31ceRhY0xJzilN5oTQ3g4Kba4izh25qQX58anFBYnJqXmpJvFuQsYGppYmlkaOhMRFKAOqWLn0</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PROCEDE ET DISPOSITIF D'AMPLIFICATION EN MODE COMMUN AUTOPOLARISE ET AUTOREGULE</title><source>esp@cenet</source><creator>NICOLAS, SANDRINE ; AYRAUD, MICHEL</creator><creatorcontrib>NICOLAS, SANDRINE ; AYRAUD, MICHEL</creatorcontrib><description>Le dispositif d'amplification comporte un étage d'amplification (TRSC) ayant un transistor d'amplification à transconductance (103) et une borne de sortie (120). Un circuit de polarisation (MC) est configuré pour polariser en mode commun la borne de sortie (120) à un potentiel de polarisation obtenu à partir d'une tension présente entre la grille et la source dudit transistor d'amplification (103), et pour compenser des variations parasites de ladite tension présente entre la grille et la source dudit transistor d'amplification (103).
An amplification device includes an amplification stage having a transconductance amplification transistor and an output terminal. A biasing circuit is configured to bias in common mode the output terminal to a bias potential obtained on the basis of a voltage present between the gate and the source of the amplification transistor, and to compensate for parasitic variations of the voltage present between the gate and the source of the amplification transistor.</description><language>fre</language><subject>AMPLIFIERS ; BASIC ELECTRIC ELEMENTS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2018</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180601&DB=EPODOC&CC=FR&NR=3059492A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20180601&DB=EPODOC&CC=FR&NR=3059492A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>NICOLAS, SANDRINE</creatorcontrib><creatorcontrib>AYRAUD, MICHEL</creatorcontrib><title>PROCEDE ET DISPOSITIF D'AMPLIFICATION EN MODE COMMUN AUTOPOLARISE ET AUTOREGULE</title><description>Le dispositif d'amplification comporte un étage d'amplification (TRSC) ayant un transistor d'amplification à transconductance (103) et une borne de sortie (120). Un circuit de polarisation (MC) est configuré pour polariser en mode commun la borne de sortie (120) à un potentiel de polarisation obtenu à partir d'une tension présente entre la grille et la source dudit transistor d'amplification (103), et pour compenser des variations parasites de ladite tension présente entre la grille et la source dudit transistor d'amplification (103).
An amplification device includes an amplification stage having a transconductance amplification transistor and an output terminal. A biasing circuit is configured to bias in common mode the output terminal to a bias potential obtained on the basis of a voltage present between the gate and the source of the amplification transistor, and to compensate for parasitic variations of the voltage present between the gate and the source of the amplification transistor.</description><subject>AMPLIFIERS</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2018</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAPCPJ3dnVxVXANUXDxDA7wD_YM8XRTcFF39A3w8XTzdHYM8fT3U3D1U_D1B6py9vf1DfVTcAwN8Q_w93EM8gwG6wTxg1zdQ31ceRhY0xJzilN5oTQ3g4Kba4izh25qQX58anFBYnJqXmpJvFuQsYGppYmlkaOhMRFKAOqWLn0</recordid><startdate>20180601</startdate><enddate>20180601</enddate><creator>NICOLAS, SANDRINE</creator><creator>AYRAUD, MICHEL</creator><scope>EVB</scope></search><sort><creationdate>20180601</creationdate><title>PROCEDE ET DISPOSITIF D'AMPLIFICATION EN MODE COMMUN AUTOPOLARISE ET AUTOREGULE</title><author>NICOLAS, SANDRINE ; AYRAUD, MICHEL</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_FR3059492A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>fre</language><creationdate>2018</creationdate><topic>AMPLIFIERS</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>NICOLAS, SANDRINE</creatorcontrib><creatorcontrib>AYRAUD, MICHEL</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>NICOLAS, SANDRINE</au><au>AYRAUD, MICHEL</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PROCEDE ET DISPOSITIF D'AMPLIFICATION EN MODE COMMUN AUTOPOLARISE ET AUTOREGULE</title><date>2018-06-01</date><risdate>2018</risdate><abstract>Le dispositif d'amplification comporte un étage d'amplification (TRSC) ayant un transistor d'amplification à transconductance (103) et une borne de sortie (120). Un circuit de polarisation (MC) est configuré pour polariser en mode commun la borne de sortie (120) à un potentiel de polarisation obtenu à partir d'une tension présente entre la grille et la source dudit transistor d'amplification (103), et pour compenser des variations parasites de ladite tension présente entre la grille et la source dudit transistor d'amplification (103).
An amplification device includes an amplification stage having a transconductance amplification transistor and an output terminal. A biasing circuit is configured to bias in common mode the output terminal to a bias potential obtained on the basis of a voltage present between the gate and the source of the amplification transistor, and to compensate for parasitic variations of the voltage present between the gate and the source of the amplification transistor.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | AMPLIFIERS BASIC ELECTRIC ELEMENTS BASIC ELECTRONIC CIRCUITRY ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | PROCEDE ET DISPOSITIF D'AMPLIFICATION EN MODE COMMUN AUTOPOLARISE ET AUTOREGULE |
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