Field effect transistor structure with insulated grid
The transistor includes a channel region which extends longitudinally between the drain and source, under the grid (6) of the transistor. This channel region includes several longitudinal depressions (8a). The depressions (8a) are filled with a material from the grid region, so that the grid materia...
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creator | HAOND MICHEL |
description | The transistor includes a channel region which extends longitudinally between the drain and source, under the grid (6) of the transistor. This channel region includes several longitudinal depressions (8a). The depressions (8a) are filled with a material from the grid region, so that the grid material is interdigitated with the channel region. The crenellated structure has the effect of increasing the effective width (W) of the transistor channel. The depressions may either consist of a series of alternating linear ribs and grooves, or of a number of concentric annular grooves with annular ribs separating them.
Le substrat du transistor comprend dans la zone de canal s'étendant longitudinalement entre les régions de drain et de source sous la grille (6), au moins une dépression longitudinale (8a) comblée par une partie de la région de grille, de façon à augmenter la largeur effective (W) du canal du transistor. |
format | Patent |
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Le substrat du transistor comprend dans la zone de canal s'étendant longitudinalement entre les régions de drain et de source sous la grille (6), au moins une dépression longitudinale (8a) comblée par une partie de la région de grille, de façon à augmenter la largeur effective (W) du canal du transistor.</description><edition>6</edition><language>eng ; fre</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES ; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES ; NANOTECHNOLOGY ; PERFORMING OPERATIONS ; SEMICONDUCTOR DEVICES ; SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES ; TRANSPORTING</subject><creationdate>1995</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19951124&DB=EPODOC&CC=FR&NR=2720191A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19951124&DB=EPODOC&CC=FR&NR=2720191A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HAOND MICHEL</creatorcontrib><title>Field effect transistor structure with insulated grid</title><description>The transistor includes a channel region which extends longitudinally between the drain and source, under the grid (6) of the transistor. This channel region includes several longitudinal depressions (8a). The depressions (8a) are filled with a material from the grid region, so that the grid material is interdigitated with the channel region. The crenellated structure has the effect of increasing the effective width (W) of the transistor channel. The depressions may either consist of a series of alternating linear ribs and grooves, or of a number of concentric annular grooves with annular ribs separating them.
Le substrat du transistor comprend dans la zone de canal s'étendant longitudinalement entre les régions de drain et de source sous la grille (6), au moins une dépression longitudinale (8a) comblée par une partie de la région de grille, de façon à augmenter la largeur effective (W) du canal du transistor.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OR TREATMENT OF NANOSTRUCTURES</subject><subject>MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES</subject><subject>NANOTECHNOLOGY</subject><subject>PERFORMING OPERATIONS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES</subject><subject>TRANSPORTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1995</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDB1y0zNSVFITUtLTS5RKClKzCvOLC7JL1IoLikqTS4pLUpVKM8syVDIzCsuzUksSU1RSC_KTOFhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfFuQUbmRgaGloaOhsZEKAEAQswtPA</recordid><startdate>19951124</startdate><enddate>19951124</enddate><creator>HAOND MICHEL</creator><scope>EVB</scope></search><sort><creationdate>19951124</creationdate><title>Field effect transistor structure with insulated grid</title><author>HAOND MICHEL</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_FR2720191A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre</language><creationdate>1995</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OR TREATMENT OF NANOSTRUCTURES</topic><topic>MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES</topic><topic>NANOTECHNOLOGY</topic><topic>PERFORMING OPERATIONS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES</topic><topic>TRANSPORTING</topic><toplevel>online_resources</toplevel><creatorcontrib>HAOND MICHEL</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HAOND MICHEL</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Field effect transistor structure with insulated grid</title><date>1995-11-24</date><risdate>1995</risdate><abstract>The transistor includes a channel region which extends longitudinally between the drain and source, under the grid (6) of the transistor. This channel region includes several longitudinal depressions (8a). The depressions (8a) are filled with a material from the grid region, so that the grid material is interdigitated with the channel region. The crenellated structure has the effect of increasing the effective width (W) of the transistor channel. The depressions may either consist of a series of alternating linear ribs and grooves, or of a number of concentric annular grooves with annular ribs separating them.
Le substrat du transistor comprend dans la zone de canal s'étendant longitudinalement entre les régions de drain et de source sous la grille (6), au moins une dépression longitudinale (8a) comblée par une partie de la région de grille, de façon à augmenter la largeur effective (W) du canal du transistor.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
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language | eng ; fre |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OR TREATMENT OF NANOSTRUCTURES MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES NANOTECHNOLOGY PERFORMING OPERATIONS SEMICONDUCTOR DEVICES SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES TRANSPORTING |
title | Field effect transistor structure with insulated grid |
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