DETECTEUR ELECTRIQUE DE NIVEAU LOGIQUE BINAIRE

To avoid the fraudulent activities of malevolent users, detection of the secret codes contained in a MOS integrated-circuit memory card, and transmitted to an input/output unit, is prevented by interposing in the transmission chain, in the integrated circuit itself, a read amplifier (50) essentially comprising two identical circuits (4, 5) in parallel and which are intended to take complementary logic states when they receive a same logic level to be detected. This results in the electrical consumption of the amplifier being the same whatever logic level is transmitted. Under these conditions it becomes impossible to deduce the nature of the logic level transmitted. As an improvement, the outputs of the detector are provided with bistable circuits (15, 18) and are mutually coupled (19, 20) to one another so as to be able to take account of detected information of transient or corrupted type.