STRESS AND OVERLAY MANAGEMENT FOR SEMICONDUCTOR PROCESSING

Provided are methods of reducing the stress of a semiconductor wafer. A wafer map of a free-standing wafer is created using metrology tools. The wafer map is then converted into a power spectral density (PSD) using a spatial frequency scale. The fundamental component of bow is then compensated with...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	SUBRAHMANYAN, Pradeep K, VARGHESE, Sony, KANG, Sean S
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
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