AN ELECTRONIC CIRCUIT HAVING VERTICAL HALL ELEMENTS ARRANGED ON A SUBSTRATE TO REDUCE AN ORTHOGONALITY ERROR
An electronic circuit can have a first plurality of vertical Hall elements and a second plurality of vertical Hall elements all disposed on a substrate having a plurality of crystal unit cells, wherein the first plurality of vertical Hall elements have longitudinal axes disposed within five degrees...
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creator | MONREAL, Gerardo, A ROMERO, Hernán, D |
description | An electronic circuit can have a first plurality of vertical Hall elements and a second plurality of vertical Hall elements all disposed on a substrate having a plurality of crystal unit cells, wherein the first plurality of vertical Hall elements have longitudinal axes disposed within five degrees of parallel to an edge of the crystal unit cells, and wherein the second plurality of vertical Hall elements have longitudinal axes disposed between eighty-five and ninety-five degrees relative to the longitudinal axes of the first plurality of vertical Hall elements. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP4278391A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP4278391A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP4278391A13</originalsourceid><addsrcrecordid>eNqNjEEKglAQQN20iOoOc4EWZlAtp3HSD7_5MY6CK5H4raQEuz8ZdIBWjwePt0wGFGDPZBrEEZBTqp1BiY2TAhpWc4R-du-_3ZXFKkBVlIJzCAIIVX2uTNEYLIByXhPDfA1qZSiCoHfWAqsGXSeLRz9McfPjKoELG5XbOL66OI39PT7ju-Pbfnc4ZqcU0-yP5AN2hDZE</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>AN ELECTRONIC CIRCUIT HAVING VERTICAL HALL ELEMENTS ARRANGED ON A SUBSTRATE TO REDUCE AN ORTHOGONALITY ERROR</title><source>esp@cenet</source><creator>MONREAL, Gerardo, A ; ROMERO, Hernán, D</creator><creatorcontrib>MONREAL, Gerardo, A ; ROMERO, Hernán, D</creatorcontrib><description>An electronic circuit can have a first plurality of vertical Hall elements and a second plurality of vertical Hall elements all disposed on a substrate having a plurality of crystal unit cells, wherein the first plurality of vertical Hall elements have longitudinal axes disposed within five degrees of parallel to an edge of the crystal unit cells, and wherein the second plurality of vertical Hall elements have longitudinal axes disposed between eighty-five and ninety-five degrees relative to the longitudinal axes of the first plurality of vertical Hall elements.</description><language>eng ; fre ; ger</language><subject>ELECTRICITY ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231122&DB=EPODOC&CC=EP&NR=4278391A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231122&DB=EPODOC&CC=EP&NR=4278391A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MONREAL, Gerardo, A</creatorcontrib><creatorcontrib>ROMERO, Hernán, D</creatorcontrib><title>AN ELECTRONIC CIRCUIT HAVING VERTICAL HALL ELEMENTS ARRANGED ON A SUBSTRATE TO REDUCE AN ORTHOGONALITY ERROR</title><description>An electronic circuit can have a first plurality of vertical Hall elements and a second plurality of vertical Hall elements all disposed on a substrate having a plurality of crystal unit cells, wherein the first plurality of vertical Hall elements have longitudinal axes disposed within five degrees of parallel to an edge of the crystal unit cells, and wherein the second plurality of vertical Hall elements have longitudinal axes disposed between eighty-five and ninety-five degrees relative to the longitudinal axes of the first plurality of vertical Hall elements.</description><subject>ELECTRICITY</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjEEKglAQQN20iOoOc4EWZlAtp3HSD7_5MY6CK5H4raQEuz8ZdIBWjwePt0wGFGDPZBrEEZBTqp1BiY2TAhpWc4R-du-_3ZXFKkBVlIJzCAIIVX2uTNEYLIByXhPDfA1qZSiCoHfWAqsGXSeLRz9McfPjKoELG5XbOL66OI39PT7ju-Pbfnc4ZqcU0-yP5AN2hDZE</recordid><startdate>20231122</startdate><enddate>20231122</enddate><creator>MONREAL, Gerardo, A</creator><creator>ROMERO, Hernán, D</creator><scope>EVB</scope></search><sort><creationdate>20231122</creationdate><title>AN ELECTRONIC CIRCUIT HAVING VERTICAL HALL ELEMENTS ARRANGED ON A SUBSTRATE TO REDUCE AN ORTHOGONALITY ERROR</title><author>MONREAL, Gerardo, A ; ROMERO, Hernán, D</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4278391A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2023</creationdate><topic>ELECTRICITY</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>MONREAL, Gerardo, A</creatorcontrib><creatorcontrib>ROMERO, Hernán, D</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MONREAL, Gerardo, A</au><au>ROMERO, Hernán, D</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>AN ELECTRONIC CIRCUIT HAVING VERTICAL HALL ELEMENTS ARRANGED ON A SUBSTRATE TO REDUCE AN ORTHOGONALITY ERROR</title><date>2023-11-22</date><risdate>2023</risdate><abstract>An electronic circuit can have a first plurality of vertical Hall elements and a second plurality of vertical Hall elements all disposed on a substrate having a plurality of crystal unit cells, wherein the first plurality of vertical Hall elements have longitudinal axes disposed within five degrees of parallel to an edge of the crystal unit cells, and wherein the second plurality of vertical Hall elements have longitudinal axes disposed between eighty-five and ninety-five degrees relative to the longitudinal axes of the first plurality of vertical Hall elements.</abstract><oa>free_for_read</oa></addata></record> |
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language | eng ; fre ; ger |
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subjects | ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING |
title | AN ELECTRONIC CIRCUIT HAVING VERTICAL HALL ELEMENTS ARRANGED ON A SUBSTRATE TO REDUCE AN ORTHOGONALITY ERROR |
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