CLOCK MONITORING UNIT WITH SERIAL CLOCK ROUTING PIPELINE

An apparatus including a serial clock routing pipeline including a first set of clock inputs and a clock output; a first set of clock generators including a first set of clock outputs coupled to the first set of clock inputs of the serial clock routing pipeline, respectively; and a first clock monit...

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Hauptverfasser: SALLUZZO, Federico, PHADKE, Amod, BHAT, Vanamali, DENA, Sina
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Sprache:eng ; fre ; ger
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creator SALLUZZO, Federico
PHADKE, Amod
BHAT, Vanamali
DENA, Sina
description An apparatus including a serial clock routing pipeline including a first set of clock inputs and a clock output; a first set of clock generators including a first set of clock outputs coupled to the first set of clock inputs of the serial clock routing pipeline, respectively; and a first clock monitoring unit including a first clock input coupled to the clock output of the serial clock routing pipeline, and a first status output to provide information concerning one or more of the first set of clock generators. The apparatus may further include a set of phase locked loops (PLLs) coupled to the set of clock generators, respectively; the set of PLLs also coupled to the clock monitoring unit.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP4264297A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP4264297A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP4264297A13</originalsourceid><addsrcrecordid>eNrjZLBw9vF39lbw9ffzDPEP8vRzVwgFshTCPUM8FIJdgzwdfRQgKoL8Q0NA0gGeAa4-nn6uPAysaYk5xam8UJqbQcHNNcTZQze1ID8-tbggMTk1L7Uk3jXAxMjMxMjS3NHQmAglACc6KEM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>CLOCK MONITORING UNIT WITH SERIAL CLOCK ROUTING PIPELINE</title><source>esp@cenet</source><creator>SALLUZZO, Federico ; PHADKE, Amod ; BHAT, Vanamali ; DENA, Sina</creator><creatorcontrib>SALLUZZO, Federico ; PHADKE, Amod ; BHAT, Vanamali ; DENA, Sina</creatorcontrib><description>An apparatus including a serial clock routing pipeline including a first set of clock inputs and a clock output; a first set of clock generators including a first set of clock outputs coupled to the first set of clock inputs of the serial clock routing pipeline, respectively; and a first clock monitoring unit including a first clock input coupled to the clock output of the serial clock routing pipeline, and a first status output to provide information concerning one or more of the first set of clock generators. The apparatus may further include a set of phase locked loops (PLLs) coupled to the set of clock generators, respectively; the set of PLLs also coupled to the clock monitoring unit.</description><language>eng ; fre ; ger</language><subject>MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20231025&amp;DB=EPODOC&amp;CC=EP&amp;NR=4264297A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20231025&amp;DB=EPODOC&amp;CC=EP&amp;NR=4264297A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SALLUZZO, Federico</creatorcontrib><creatorcontrib>PHADKE, Amod</creatorcontrib><creatorcontrib>BHAT, Vanamali</creatorcontrib><creatorcontrib>DENA, Sina</creatorcontrib><title>CLOCK MONITORING UNIT WITH SERIAL CLOCK ROUTING PIPELINE</title><description>An apparatus including a serial clock routing pipeline including a first set of clock inputs and a clock output; a first set of clock generators including a first set of clock outputs coupled to the first set of clock inputs of the serial clock routing pipeline, respectively; and a first clock monitoring unit including a first clock input coupled to the clock output of the serial clock routing pipeline, and a first status output to provide information concerning one or more of the first set of clock generators. The apparatus may further include a set of phase locked loops (PLLs) coupled to the set of clock generators, respectively; the set of PLLs also coupled to the clock monitoring unit.</description><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLBw9vF39lbw9ffzDPEP8vRzVwgFshTCPUM8FIJdgzwdfRQgKoL8Q0NA0gGeAa4-nn6uPAysaYk5xam8UJqbQcHNNcTZQze1ID8-tbggMTk1L7Uk3jXAxMjMxMjS3NHQmAglACc6KEM</recordid><startdate>20231025</startdate><enddate>20231025</enddate><creator>SALLUZZO, Federico</creator><creator>PHADKE, Amod</creator><creator>BHAT, Vanamali</creator><creator>DENA, Sina</creator><scope>EVB</scope></search><sort><creationdate>20231025</creationdate><title>CLOCK MONITORING UNIT WITH SERIAL CLOCK ROUTING PIPELINE</title><author>SALLUZZO, Federico ; PHADKE, Amod ; BHAT, Vanamali ; DENA, Sina</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4264297A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2023</creationdate><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>SALLUZZO, Federico</creatorcontrib><creatorcontrib>PHADKE, Amod</creatorcontrib><creatorcontrib>BHAT, Vanamali</creatorcontrib><creatorcontrib>DENA, Sina</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SALLUZZO, Federico</au><au>PHADKE, Amod</au><au>BHAT, Vanamali</au><au>DENA, Sina</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>CLOCK MONITORING UNIT WITH SERIAL CLOCK ROUTING PIPELINE</title><date>2023-10-25</date><risdate>2023</risdate><abstract>An apparatus including a serial clock routing pipeline including a first set of clock inputs and a clock output; a first set of clock generators including a first set of clock outputs coupled to the first set of clock inputs of the serial clock routing pipeline, respectively; and a first clock monitoring unit including a first clock input coupled to the clock output of the serial clock routing pipeline, and a first status output to provide information concerning one or more of the first set of clock generators. The apparatus may further include a set of phase locked loops (PLLs) coupled to the set of clock generators, respectively; the set of PLLs also coupled to the clock monitoring unit.</abstract><oa>free_for_read</oa></addata></record>
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subjects MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
title CLOCK MONITORING UNIT WITH SERIAL CLOCK ROUTING PIPELINE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-14T11%3A09%3A46IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SALLUZZO,%20Federico&rft.date=2023-10-25&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP4264297A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true