DOUBLE IO PAD CELL INCLUDING ELECTROSTATIC DISCHARGE PROTECTION SCHEME WITH REDUCED LATCH-UP RISK

A double IO pad cell including a busing frame formed on a busing metal layer aligned with a same-sized component frame integrated on a component layer of an IC. The busing frame includes first and second IO pads, a supply voltage rail, and a ground voltage rail. The component frame includes first an...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Moosa, Mohamed Suleman, Stockinger, Michael A
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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