MULTILAYER STRUCTURE WITH EMBEDDED MULTILAYER ELECTRONICS
An integrated multilayer assembly (100, 200, 300) for an electronic device comprising a first substrate film (106) configured to accommodate electrical features on at least first side thereof, said first substrate film having the first side and a substantially opposing second side, a second substrat...
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creator | SÄÄSKI, Jarmo HEIKKINEN, Mikko RAAPPANA, Pasi TORVINEN, Jarkko |
description | An integrated multilayer assembly (100, 200, 300) for an electronic device comprising a first substrate film (106) configured to accommodate electrical features on at least first side thereof, said first substrate film having the first side and a substantially opposing second side, a second substrate film (202) configured to accommodate electrical features on at least first side thereof, said second substrate film having the first side and a substantially opposing second side, the first sides of the first and second substrate films being configured to face each other, at least one electrical feature (214B) on the first side of the first substrate film, at least one other electrical feature (214A) on the first side of the second substrate film, and a molded plastic layer (204) between the first and second substrate films at least partially embedding the electrical features on the first sides thereof. A related method of manufacture is presented. |
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A related method of manufacture is presented.</description><language>eng ; fre ; ger</language><subject>AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING ; BASIC ELECTRIC ELEMENTS ; CALCULATING ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; LAYERED PRODUCTS ; LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PERFORMING OPERATIONS ; PHYSICS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES ; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDEDFOR ; SHAPING OR JOINING OF PLASTICS ; TRANSPORTING ; WORKING OF PLASTICS ; WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230621&DB=EPODOC&CC=EP&NR=4164346A3$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230621&DB=EPODOC&CC=EP&NR=4164346A3$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SÄÄSKI, Jarmo</creatorcontrib><creatorcontrib>HEIKKINEN, Mikko</creatorcontrib><creatorcontrib>RAAPPANA, Pasi</creatorcontrib><creatorcontrib>TORVINEN, Jarkko</creatorcontrib><title>MULTILAYER STRUCTURE WITH EMBEDDED MULTILAYER ELECTRONICS</title><description>An integrated multilayer assembly (100, 200, 300) for an electronic device comprising a first substrate film (106) configured to accommodate electrical features on at least first side thereof, said first substrate film having the first side and a substantially opposing second side, a second substrate film (202) configured to accommodate electrical features on at least first side thereof, said second substrate film having the first side and a substantially opposing second side, the first sides of the first and second substrate films being configured to face each other, at least one electrical feature (214B) on the first side of the first substrate film, at least one other electrical feature (214A) on the first side of the second substrate film, and a molded plastic layer (204) between the first and second substrate films at least partially embedding the electrical features on the first sides thereof. A related method of manufacture is presented.</description><subject>AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CALCULATING</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>LAYERED PRODUCTS</subject><subject>LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PERFORMING OPERATIONS</subject><subject>PHYSICS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDEDFOR</subject><subject>SHAPING OR JOINING OF PLASTICS</subject><subject>TRANSPORTING</subject><subject>WORKING OF PLASTICS</subject><subject>WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLD0DfUJ8fRxjHQNUggOCQp1DgkNclUI9wzxUHD1dXJ1cXF1UUBS4urj6hwS5O_n6RzMw8CalphTnMoLpbkZFNxcQ5w9dFML8uNTiwsSk1PzUkviXQNMDM1MjE3MHI2NiVACAH6sKOY</recordid><startdate>20230621</startdate><enddate>20230621</enddate><creator>SÄÄSKI, Jarmo</creator><creator>HEIKKINEN, Mikko</creator><creator>RAAPPANA, Pasi</creator><creator>TORVINEN, Jarkko</creator><scope>EVB</scope></search><sort><creationdate>20230621</creationdate><title>MULTILAYER STRUCTURE WITH EMBEDDED MULTILAYER ELECTRONICS</title><author>SÄÄSKI, Jarmo ; HEIKKINEN, Mikko ; RAAPPANA, Pasi ; TORVINEN, Jarkko</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4164346A33</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2023</creationdate><topic>AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CALCULATING</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>LAYERED PRODUCTS</topic><topic>LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PERFORMING OPERATIONS</topic><topic>PHYSICS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDEDFOR</topic><topic>SHAPING OR JOINING OF PLASTICS</topic><topic>TRANSPORTING</topic><topic>WORKING OF PLASTICS</topic><topic>WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL</topic><toplevel>online_resources</toplevel><creatorcontrib>SÄÄSKI, Jarmo</creatorcontrib><creatorcontrib>HEIKKINEN, Mikko</creatorcontrib><creatorcontrib>RAAPPANA, Pasi</creatorcontrib><creatorcontrib>TORVINEN, Jarkko</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SÄÄSKI, Jarmo</au><au>HEIKKINEN, Mikko</au><au>RAAPPANA, Pasi</au><au>TORVINEN, Jarkko</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MULTILAYER STRUCTURE WITH EMBEDDED MULTILAYER ELECTRONICS</title><date>2023-06-21</date><risdate>2023</risdate><abstract>An integrated multilayer assembly (100, 200, 300) for an electronic device comprising a first substrate film (106) configured to accommodate electrical features on at least first side thereof, said first substrate film having the first side and a substantially opposing second side, a second substrate film (202) configured to accommodate electrical features on at least first side thereof, said second substrate film having the first side and a substantially opposing second side, the first sides of the first and second substrate films being configured to face each other, at least one electrical feature (214B) on the first side of the first substrate film, at least one other electrical feature (214A) on the first side of the second substrate film, and a molded plastic layer (204) between the first and second substrate films at least partially embedding the electrical features on the first sides thereof. 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language | eng ; fre ; ger |
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source | esp@cenet |
subjects | AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING BASIC ELECTRIC ELEMENTS CALCULATING CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY LAYERED PRODUCTS LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PERFORMING OPERATIONS PHYSICS PRINTED CIRCUITS SEMICONDUCTOR DEVICES SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDEDFOR SHAPING OR JOINING OF PLASTICS TRANSPORTING WORKING OF PLASTICS WORKING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL |
title | MULTILAYER STRUCTURE WITH EMBEDDED MULTILAYER ELECTRONICS |
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