SEMICONDUCTOR PROCESSING DEVICE
The present disclosure discloses a semiconductor processing apparatus, which is configured to perform processing on a wafer. The disclosed semiconductor processing apparatus includes a vacuum interlock chamber, a plurality of apparatus bodies, the apparatus body including a transfer platform, and at...
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creator | WEI, Jingfeng SHE, Qing |
description | The present disclosure discloses a semiconductor processing apparatus, which is configured to perform processing on a wafer. The disclosed semiconductor processing apparatus includes a vacuum interlock chamber, a plurality of apparatus bodies, the apparatus body including a transfer platform, and at least two reaction chambers being arranged along a circumferential direction of the transfer platform, and a temporary storage channel, any two neighboring apparatus bodies being communicated through the temporary storage channel, and the temporary storage channel being configured to temporarily store the wafer. One of the plueality apparatus bodies is connected to the vacuum interlock chamber. The transfer platform is configured to transfer the wafer between the vacuum interlock chamber and the reaction chamber, between the temporary storage channel and the vacuum interlock chamber, and between the temporary storage channel and the reaction chamber. With the above solution, the problem that the productivity of the semiconductor processing apparatus is low is solved. |
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The disclosed semiconductor processing apparatus includes a vacuum interlock chamber, a plurality of apparatus bodies, the apparatus body including a transfer platform, and at least two reaction chambers being arranged along a circumferential direction of the transfer platform, and a temporary storage channel, any two neighboring apparatus bodies being communicated through the temporary storage channel, and the temporary storage channel being configured to temporarily store the wafer. One of the plueality apparatus bodies is connected to the vacuum interlock chamber. The transfer platform is configured to transfer the wafer between the vacuum interlock chamber and the reaction chamber, between the temporary storage channel and the vacuum interlock chamber, and between the temporary storage channel and the reaction chamber. With the above solution, the problem that the productivity of the semiconductor processing apparatus is low is solved.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; CHEMICAL SURFACE TREATMENT ; CHEMISTRY ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING MATERIAL WITH METALLIC MATERIAL ; COATING METALLIC MATERIAL ; DIFFUSION TREATMENT OF METALLIC MATERIAL ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL ; METALLURGY ; SEMICONDUCTOR DEVICES ; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230215&DB=EPODOC&CC=EP&NR=4135015A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76419</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230215&DB=EPODOC&CC=EP&NR=4135015A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WEI, Jingfeng</creatorcontrib><creatorcontrib>SHE, Qing</creatorcontrib><title>SEMICONDUCTOR PROCESSING DEVICE</title><description>The present disclosure discloses a semiconductor processing apparatus, which is configured to perform processing on a wafer. The disclosed semiconductor processing apparatus includes a vacuum interlock chamber, a plurality of apparatus bodies, the apparatus body including a transfer platform, and at least two reaction chambers being arranged along a circumferential direction of the transfer platform, and a temporary storage channel, any two neighboring apparatus bodies being communicated through the temporary storage channel, and the temporary storage channel being configured to temporarily store the wafer. One of the plueality apparatus bodies is connected to the vacuum interlock chamber. The transfer platform is configured to transfer the wafer between the vacuum interlock chamber and the reaction chamber, between the temporary storage channel and the vacuum interlock chamber, and between the temporary storage channel and the reaction chamber. With the above solution, the problem that the productivity of the semiconductor processing apparatus is low is solved.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CHEMICAL SURFACE TREATMENT</subject><subject>CHEMISTRY</subject><subject>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</subject><subject>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</subject><subject>COATING MATERIAL WITH METALLIC MATERIAL</subject><subject>COATING METALLIC MATERIAL</subject><subject>DIFFUSION TREATMENT OF METALLIC MATERIAL</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL</subject><subject>METALLURGY</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJAPdvX1dPb3cwl1DvEPUggI8nd2DQ729HNXcHEN83R25WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8a4BJobGpgaGpo6GxkQoAQCqqCFg</recordid><startdate>20230215</startdate><enddate>20230215</enddate><creator>WEI, Jingfeng</creator><creator>SHE, Qing</creator><scope>EVB</scope></search><sort><creationdate>20230215</creationdate><title>SEMICONDUCTOR PROCESSING DEVICE</title><author>WEI, Jingfeng ; SHE, Qing</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4135015A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CHEMICAL SURFACE TREATMENT</topic><topic>CHEMISTRY</topic><topic>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</topic><topic>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</topic><topic>COATING MATERIAL WITH METALLIC MATERIAL</topic><topic>COATING METALLIC MATERIAL</topic><topic>DIFFUSION TREATMENT OF METALLIC MATERIAL</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL</topic><topic>METALLURGY</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</topic><toplevel>online_resources</toplevel><creatorcontrib>WEI, Jingfeng</creatorcontrib><creatorcontrib>SHE, Qing</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WEI, Jingfeng</au><au>SHE, Qing</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR PROCESSING DEVICE</title><date>2023-02-15</date><risdate>2023</risdate><abstract>The present disclosure discloses a semiconductor processing apparatus, which is configured to perform processing on a wafer. The disclosed semiconductor processing apparatus includes a vacuum interlock chamber, a plurality of apparatus bodies, the apparatus body including a transfer platform, and at least two reaction chambers being arranged along a circumferential direction of the transfer platform, and a temporary storage channel, any two neighboring apparatus bodies being communicated through the temporary storage channel, and the temporary storage channel being configured to temporarily store the wafer. One of the plueality apparatus bodies is connected to the vacuum interlock chamber. The transfer platform is configured to transfer the wafer between the vacuum interlock chamber and the reaction chamber, between the temporary storage channel and the vacuum interlock chamber, and between the temporary storage channel and the reaction chamber. With the above solution, the problem that the productivity of the semiconductor processing apparatus is low is solved.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS CHEMICAL SURFACE TREATMENT CHEMISTRY COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING MATERIAL WITH METALLIC MATERIAL COATING METALLIC MATERIAL DIFFUSION TREATMENT OF METALLIC MATERIAL ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL METALLURGY SEMICONDUCTOR DEVICES SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION |
title | SEMICONDUCTOR PROCESSING DEVICE |
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