DEVICE, METHOD AND SYSTEM TO PROVIDE THREAD SCHEDULING HINTS TO A SOFTWARE PROCESS

Techniques and mechanisms for providing a thread scheduling hint to an operating system of a processor which comprises first cores and second cores. In an embodiment, the first cores are of a first type which corresponds to a first range of sizes, and the second cores are of a second type which corr...

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Hauptverfasser: MANDELBLAT, Julius, BASSIN, Vadim, WEISSMANN, Eliezer, ROTEM, Efraim
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creator MANDELBLAT, Julius
BASSIN, Vadim
WEISSMANN, Eliezer
ROTEM, Efraim
description Techniques and mechanisms for providing a thread scheduling hint to an operating system of a processor which comprises first cores and second cores. In an embodiment, the first cores are of a first type which corresponds to a first range of sizes, and the second cores are of a second type which corresponds to a second range of sizes smaller than the first range of sizes. A power control unit (PCU) of the processor is to detect that an inefficiency, of a first operational mode of the processor, would exist while an indication of an amount of power, to be available to the processor, is below a threshold. Based on the detecting, the PCU hints to an executing software process that a given core is to be included in, or omitted from, a pool of cores available for thread scheduling. The hint indicates the given core based on a relative prioritization of the first core type and the second core type.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP4120081A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP4120081A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP4120081A13</originalsourceid><addsrcrecordid>eNqNyrEKwjAURuEuDqK-w30AhUYdXEPy1wRsUnKvFadSJE6ihfr-aMEHcDrD-eZFsmi9wZpqiIuWdLDEVxbUJJGaFFtvQeIS9HcYB3s--XAk54PwRDRxrOSiEyZtwLwsZvf-MebVr4uCKohxmzy8ujwO_S0_87tDs1fbsjworXZ_kA9N4i7k</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>DEVICE, METHOD AND SYSTEM TO PROVIDE THREAD SCHEDULING HINTS TO A SOFTWARE PROCESS</title><source>esp@cenet</source><creator>MANDELBLAT, Julius ; BASSIN, Vadim ; WEISSMANN, Eliezer ; ROTEM, Efraim</creator><creatorcontrib>MANDELBLAT, Julius ; BASSIN, Vadim ; WEISSMANN, Eliezer ; ROTEM, Efraim</creatorcontrib><description>Techniques and mechanisms for providing a thread scheduling hint to an operating system of a processor which comprises first cores and second cores. In an embodiment, the first cores are of a first type which corresponds to a first range of sizes, and the second cores are of a second type which corresponds to a second range of sizes smaller than the first range of sizes. A power control unit (PCU) of the processor is to detect that an inefficiency, of a first operational mode of the processor, would exist while an indication of an amount of power, to be available to the processor, is below a threshold. Based on the detecting, the PCU hints to an executing software process that a given core is to be included in, or omitted from, a pool of cores available for thread scheduling. The hint indicates the given core based on a relative prioritization of the first core type and the second core type.</description><language>eng ; fre ; ger</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230118&amp;DB=EPODOC&amp;CC=EP&amp;NR=4120081A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230118&amp;DB=EPODOC&amp;CC=EP&amp;NR=4120081A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MANDELBLAT, Julius</creatorcontrib><creatorcontrib>BASSIN, Vadim</creatorcontrib><creatorcontrib>WEISSMANN, Eliezer</creatorcontrib><creatorcontrib>ROTEM, Efraim</creatorcontrib><title>DEVICE, METHOD AND SYSTEM TO PROVIDE THREAD SCHEDULING HINTS TO A SOFTWARE PROCESS</title><description>Techniques and mechanisms for providing a thread scheduling hint to an operating system of a processor which comprises first cores and second cores. In an embodiment, the first cores are of a first type which corresponds to a first range of sizes, and the second cores are of a second type which corresponds to a second range of sizes smaller than the first range of sizes. A power control unit (PCU) of the processor is to detect that an inefficiency, of a first operational mode of the processor, would exist while an indication of an amount of power, to be available to the processor, is below a threshold. Based on the detecting, the PCU hints to an executing software process that a given core is to be included in, or omitted from, a pool of cores available for thread scheduling. The hint indicates the given core based on a relative prioritization of the first core type and the second core type.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyrEKwjAURuEuDqK-w30AhUYdXEPy1wRsUnKvFadSJE6ihfr-aMEHcDrD-eZFsmi9wZpqiIuWdLDEVxbUJJGaFFtvQeIS9HcYB3s--XAk54PwRDRxrOSiEyZtwLwsZvf-MebVr4uCKohxmzy8ujwO_S0_87tDs1fbsjworXZ_kA9N4i7k</recordid><startdate>20230118</startdate><enddate>20230118</enddate><creator>MANDELBLAT, Julius</creator><creator>BASSIN, Vadim</creator><creator>WEISSMANN, Eliezer</creator><creator>ROTEM, Efraim</creator><scope>EVB</scope></search><sort><creationdate>20230118</creationdate><title>DEVICE, METHOD AND SYSTEM TO PROVIDE THREAD SCHEDULING HINTS TO A SOFTWARE PROCESS</title><author>MANDELBLAT, Julius ; BASSIN, Vadim ; WEISSMANN, Eliezer ; ROTEM, Efraim</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4120081A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2023</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>MANDELBLAT, Julius</creatorcontrib><creatorcontrib>BASSIN, Vadim</creatorcontrib><creatorcontrib>WEISSMANN, Eliezer</creatorcontrib><creatorcontrib>ROTEM, Efraim</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MANDELBLAT, Julius</au><au>BASSIN, Vadim</au><au>WEISSMANN, Eliezer</au><au>ROTEM, Efraim</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>DEVICE, METHOD AND SYSTEM TO PROVIDE THREAD SCHEDULING HINTS TO A SOFTWARE PROCESS</title><date>2023-01-18</date><risdate>2023</risdate><abstract>Techniques and mechanisms for providing a thread scheduling hint to an operating system of a processor which comprises first cores and second cores. In an embodiment, the first cores are of a first type which corresponds to a first range of sizes, and the second cores are of a second type which corresponds to a second range of sizes smaller than the first range of sizes. A power control unit (PCU) of the processor is to detect that an inefficiency, of a first operational mode of the processor, would exist while an indication of an amount of power, to be available to the processor, is below a threshold. Based on the detecting, the PCU hints to an executing software process that a given core is to be included in, or omitted from, a pool of cores available for thread scheduling. The hint indicates the given core based on a relative prioritization of the first core type and the second core type.</abstract><oa>free_for_read</oa></addata></record>
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language eng ; fre ; ger
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title DEVICE, METHOD AND SYSTEM TO PROVIDE THREAD SCHEDULING HINTS TO A SOFTWARE PROCESS
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