QUASI-VOLATILE SYSTEM-LEVEL MEMORY

A high-capacity system memory may be built from both quasi-volatile (QV) memory circuits, logic circuits, and static random-access memory (SRAM) circuits. Using the SRAM circuits as buffers or cache for the QV memory circuits, the system memory may achieve access latency performance of the SRAM circ...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: CHERNICOFF, Richard S, QUADER, Khandker Nazrul, LEE, Frank Sai-keung, KIM, Youn Cheul, MOFIDI, Mehrdad, NORMAN, Robert D, HARARI, Eli
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator CHERNICOFF, Richard S
QUADER, Khandker Nazrul
LEE, Frank Sai-keung
KIM, Youn Cheul
MOFIDI, Mehrdad
NORMAN, Robert D
HARARI, Eli
description A high-capacity system memory may be built from both quasi-volatile (QV) memory circuits, logic circuits, and static random-access memory (SRAM) circuits. Using the SRAM circuits as buffers or cache for the QV memory circuits, the system memory may achieve access latency performance of the SRAM circuits and may be used as code memory. The system memory is also capable of direct memory access (DMA) operations and includes an arithmetic logic unit for performing computational memory tasks. The system memory may include one or more embedded processor. In addition, the system memory may be configured for multi-channel memory accesses by multiple host processors over multiple host ports. The system memory may be provided in the dual-in-line memory module (DIMM) format.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP4100839A4</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP4100839A4</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP4100839A43</originalsourceid><addsrcrecordid>eNrjZFAKDHUM9tQN8_dxDPH0cVUIjgwOcfXV9XENc_VR8HX19Q-K5GFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8a4BJoYGBhbGlo4mxkQoAQAWmiJc</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>QUASI-VOLATILE SYSTEM-LEVEL MEMORY</title><source>esp@cenet</source><creator>CHERNICOFF, Richard S ; QUADER, Khandker Nazrul ; LEE, Frank Sai-keung ; KIM, Youn Cheul ; MOFIDI, Mehrdad ; NORMAN, Robert D ; HARARI, Eli</creator><creatorcontrib>CHERNICOFF, Richard S ; QUADER, Khandker Nazrul ; LEE, Frank Sai-keung ; KIM, Youn Cheul ; MOFIDI, Mehrdad ; NORMAN, Robert D ; HARARI, Eli</creatorcontrib><description>A high-capacity system memory may be built from both quasi-volatile (QV) memory circuits, logic circuits, and static random-access memory (SRAM) circuits. Using the SRAM circuits as buffers or cache for the QV memory circuits, the system memory may achieve access latency performance of the SRAM circuits and may be used as code memory. The system memory is also capable of direct memory access (DMA) operations and includes an arithmetic logic unit for performing computational memory tasks. The system memory may include one or more embedded processor. In addition, the system memory may be configured for multi-channel memory accesses by multiple host processors over multiple host ports. The system memory may be provided in the dual-in-line memory module (DIMM) format.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; PHYSICS ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240313&amp;DB=EPODOC&amp;CC=EP&amp;NR=4100839A4$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25568,76551</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240313&amp;DB=EPODOC&amp;CC=EP&amp;NR=4100839A4$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHERNICOFF, Richard S</creatorcontrib><creatorcontrib>QUADER, Khandker Nazrul</creatorcontrib><creatorcontrib>LEE, Frank Sai-keung</creatorcontrib><creatorcontrib>KIM, Youn Cheul</creatorcontrib><creatorcontrib>MOFIDI, Mehrdad</creatorcontrib><creatorcontrib>NORMAN, Robert D</creatorcontrib><creatorcontrib>HARARI, Eli</creatorcontrib><title>QUASI-VOLATILE SYSTEM-LEVEL MEMORY</title><description>A high-capacity system memory may be built from both quasi-volatile (QV) memory circuits, logic circuits, and static random-access memory (SRAM) circuits. Using the SRAM circuits as buffers or cache for the QV memory circuits, the system memory may achieve access latency performance of the SRAM circuits and may be used as code memory. The system memory is also capable of direct memory access (DMA) operations and includes an arithmetic logic unit for performing computational memory tasks. The system memory may include one or more embedded processor. In addition, the system memory may be configured for multi-channel memory accesses by multiple host processors over multiple host ports. The system memory may be provided in the dual-in-line memory module (DIMM) format.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAKDHUM9tQN8_dxDPH0cVUIjgwOcfXV9XENc_VR8HX19Q-K5GFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8a4BJoYGBhbGlo4mxkQoAQAWmiJc</recordid><startdate>20240313</startdate><enddate>20240313</enddate><creator>CHERNICOFF, Richard S</creator><creator>QUADER, Khandker Nazrul</creator><creator>LEE, Frank Sai-keung</creator><creator>KIM, Youn Cheul</creator><creator>MOFIDI, Mehrdad</creator><creator>NORMAN, Robert D</creator><creator>HARARI, Eli</creator><scope>EVB</scope></search><sort><creationdate>20240313</creationdate><title>QUASI-VOLATILE SYSTEM-LEVEL MEMORY</title><author>CHERNICOFF, Richard S ; QUADER, Khandker Nazrul ; LEE, Frank Sai-keung ; KIM, Youn Cheul ; MOFIDI, Mehrdad ; NORMAN, Robert D ; HARARI, Eli</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4100839A43</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHERNICOFF, Richard S</creatorcontrib><creatorcontrib>QUADER, Khandker Nazrul</creatorcontrib><creatorcontrib>LEE, Frank Sai-keung</creatorcontrib><creatorcontrib>KIM, Youn Cheul</creatorcontrib><creatorcontrib>MOFIDI, Mehrdad</creatorcontrib><creatorcontrib>NORMAN, Robert D</creatorcontrib><creatorcontrib>HARARI, Eli</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHERNICOFF, Richard S</au><au>QUADER, Khandker Nazrul</au><au>LEE, Frank Sai-keung</au><au>KIM, Youn Cheul</au><au>MOFIDI, Mehrdad</au><au>NORMAN, Robert D</au><au>HARARI, Eli</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>QUASI-VOLATILE SYSTEM-LEVEL MEMORY</title><date>2024-03-13</date><risdate>2024</risdate><abstract>A high-capacity system memory may be built from both quasi-volatile (QV) memory circuits, logic circuits, and static random-access memory (SRAM) circuits. Using the SRAM circuits as buffers or cache for the QV memory circuits, the system memory may achieve access latency performance of the SRAM circuits and may be used as code memory. The system memory is also capable of direct memory access (DMA) operations and includes an arithmetic logic unit for performing computational memory tasks. The system memory may include one or more embedded processor. In addition, the system memory may be configured for multi-channel memory accesses by multiple host processors over multiple host ports. The system memory may be provided in the dual-in-line memory module (DIMM) format.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; fre ; ger
recordid cdi_epo_espacenet_EP4100839A4
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
SEMICONDUCTOR DEVICES
title QUASI-VOLATILE SYSTEM-LEVEL MEMORY
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-16T17%3A53%3A36IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHERNICOFF,%20Richard%20S&rft.date=2024-03-13&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP4100839A4%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true