INSTRUCTION CACHE PREFETCH THROTTLE

INSTRUCTION CACHE PREFETCH THROTTLE

Techniques for controlling prefetching of instructions into an instruction cache are provided. The techniques include tracking either or both of branch target buffer misses and instruction cache misses, modifying a throttle toggle based on the tracking, and adjusting prefetch activity based on the t...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: THYAGARAJAN, Aparna, WONG, Angelo, JONES, William E, VENKATACHAR, Ashok Tirupathy, EVERS, Marius
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator THYAGARAJAN, Aparna
WONG, Angelo
JONES, William E
VENKATACHAR, Ashok Tirupathy
EVERS, Marius
description Techniques for controlling prefetching of instructions into an instruction cache are provided. The techniques include tracking either or both of branch target buffer misses and instruction cache misses, modifying a throttle toggle based on the tracking, and adjusting prefetch activity based on the throttle toggle.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP4073637A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP4073637A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP4073637A13</originalsourceid><addsrcrecordid>eNrjZFD29AsOCQp1DvH091NwdnT2cFUICHJ1cw1x9lAI8QjyDwnxceVhYE1LzClO5YXS3AwKYAW6qQX58anFBYnJqXmpJfGuASYG5sZmxuaOhsZEKAEALl4iiw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>INSTRUCTION CACHE PREFETCH THROTTLE</title><source>esp@cenet</source><creator>THYAGARAJAN, Aparna ; WONG, Angelo ; JONES, William E ; VENKATACHAR, Ashok Tirupathy ; EVERS, Marius</creator><creatorcontrib>THYAGARAJAN, Aparna ; WONG, Angelo ; JONES, William E ; VENKATACHAR, Ashok Tirupathy ; EVERS, Marius</creatorcontrib><description>Techniques for controlling prefetching of instructions into an instruction cache are provided. The techniques include tracking either or both of branch target buffer misses and instruction cache misses, modifying a throttle toggle based on the tracking, and adjusting prefetch activity based on the throttle toggle.</description><language>eng ; fre ; ger</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20221019&amp;DB=EPODOC&amp;CC=EP&amp;NR=4073637A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20221019&amp;DB=EPODOC&amp;CC=EP&amp;NR=4073637A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>THYAGARAJAN, Aparna</creatorcontrib><creatorcontrib>WONG, Angelo</creatorcontrib><creatorcontrib>JONES, William E</creatorcontrib><creatorcontrib>VENKATACHAR, Ashok Tirupathy</creatorcontrib><creatorcontrib>EVERS, Marius</creatorcontrib><title>INSTRUCTION CACHE PREFETCH THROTTLE</title><description>Techniques for controlling prefetching of instructions into an instruction cache are provided. The techniques include tracking either or both of branch target buffer misses and instruction cache misses, modifying a throttle toggle based on the tracking, and adjusting prefetch activity based on the throttle toggle.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD29AsOCQp1DvH091NwdnT2cFUICHJ1cw1x9lAI8QjyDwnxceVhYE1LzClO5YXS3AwKYAW6qQX58anFBYnJqXmpJfGuASYG5sZmxuaOhsZEKAEALl4iiw</recordid><startdate>20221019</startdate><enddate>20221019</enddate><creator>THYAGARAJAN, Aparna</creator><creator>WONG, Angelo</creator><creator>JONES, William E</creator><creator>VENKATACHAR, Ashok Tirupathy</creator><creator>EVERS, Marius</creator><scope>EVB</scope></search><sort><creationdate>20221019</creationdate><title>INSTRUCTION CACHE PREFETCH THROTTLE</title><author>THYAGARAJAN, Aparna ; WONG, Angelo ; JONES, William E ; VENKATACHAR, Ashok Tirupathy ; EVERS, Marius</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4073637A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2022</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>THYAGARAJAN, Aparna</creatorcontrib><creatorcontrib>WONG, Angelo</creatorcontrib><creatorcontrib>JONES, William E</creatorcontrib><creatorcontrib>VENKATACHAR, Ashok Tirupathy</creatorcontrib><creatorcontrib>EVERS, Marius</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>THYAGARAJAN, Aparna</au><au>WONG, Angelo</au><au>JONES, William E</au><au>VENKATACHAR, Ashok Tirupathy</au><au>EVERS, Marius</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>INSTRUCTION CACHE PREFETCH THROTTLE</title><date>2022-10-19</date><risdate>2022</risdate><abstract>Techniques for controlling prefetching of instructions into an instruction cache are provided. The techniques include tracking either or both of branch target buffer misses and instruction cache misses, modifying a throttle toggle based on the tracking, and adjusting prefetch activity based on the throttle toggle.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; fre ; ger
recordid cdi_epo_espacenet_EP4073637A1
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title INSTRUCTION CACHE PREFETCH THROTTLE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-09T15%3A57%3A56IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=THYAGARAJAN,%20Aparna&rft.date=2022-10-19&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP4073637A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true