AN ELECTRONIC CIRCUIT THAT GENERATES A HIGH-IMPEDANCE LOAD AND AN ASSOCIATED METHOD
An electronic circuit configured to present a high-impedance load between a load point and a reference point includes a capacitive element (C) provided between a first node (Node A) and the reference point, a first element (D1) connected in parallel with the capacitive element (C), a first switching...
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| creator | SUNTKEN, Artur, Wilhelm FAURÉ, Nicolaas, Mattheus |
| description | An electronic circuit configured to present a high-impedance load between a load point and a reference point includes a capacitive element (C) provided between a first node (Node A) and the reference point, a first element (D1) connected in parallel with the capacitive element (C), a first switching element (S1) provided in series between the first node (A) and a voltage source point, a second switching element (S2) provided between the first node (A) and a second node (Node B), a second element (D2) connected between the second switching element (S2), the load point, and the reference point, and timing control logic configured to implement three stages. In a charging stage, the first switching element (S1) is closed and the second switching element (S2) to charge a nodal voltage vD(t) at the first node (A). In discharge stage, the first switching element (S1) is open and the second switching element (S2) is open to enable discharging of the capacitive element (C) through the first element (D1). In a transfer stage, the second switching element (S2) is closed to connect the first node (A) and the second node (B), after which the second switching element (S2) is opened and the second element (D2) is biased to present the high-impedance load. |
| format | Patent |
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In a charging stage, the first switching element (S1) is closed and the second switching element (S2) to charge a nodal voltage vD(t) at the first node (A). In discharge stage, the first switching element (S1) is open and the second switching element (S2) is open to enable discharging of the capacitive element (C) through the first element (D1). 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In a charging stage, the first switching element (S1) is closed and the second switching element (S2) to charge a nodal voltage vD(t) at the first node (A). In discharge stage, the first switching element (S1) is open and the second switching element (S2) is open to enable discharging of the capacitive element (C) through the first element (D1). In a transfer stage, the second switching element (S2) is closed to connect the first node (A) and the second node (B), after which the second switching element (S2) is opened and the second element (D2) is biased to present the high-impedance load.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS</subject><subject>RESONATORS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNykEKwjAQQNFsXIh6h7lAQW11P0zGZqBNSjJdlyJxJVqo96cVPICLz9-8rUnogRsmjcELAUmkXhTUoULNniMqJ0BwUrtC2o4temJoAlpA_w0wpUCyOgstqwt2bzaP8Tnnw-87AzdWckWe3kOep_GeX_kzcFcdr-dLWeGp_IMsTusuwg</recordid><startdate>20220928</startdate><enddate>20220928</enddate><creator>SUNTKEN, Artur, Wilhelm</creator><creator>FAURÉ, Nicolaas, Mattheus</creator><scope>EVB</scope></search><sort><creationdate>20220928</creationdate><title>AN ELECTRONIC CIRCUIT THAT GENERATES A HIGH-IMPEDANCE LOAD AND AN ASSOCIATED METHOD</title><author>SUNTKEN, Artur, Wilhelm ; FAURÉ, Nicolaas, Mattheus</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4062534A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2022</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS</topic><topic>RESONATORS</topic><toplevel>online_resources</toplevel><creatorcontrib>SUNTKEN, Artur, Wilhelm</creatorcontrib><creatorcontrib>FAURÉ, Nicolaas, Mattheus</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SUNTKEN, Artur, Wilhelm</au><au>FAURÉ, Nicolaas, Mattheus</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>AN ELECTRONIC CIRCUIT THAT GENERATES A HIGH-IMPEDANCE LOAD AND AN ASSOCIATED METHOD</title><date>2022-09-28</date><risdate>2022</risdate><abstract>An electronic circuit configured to present a high-impedance load between a load point and a reference point includes a capacitive element (C) provided between a first node (Node A) and the reference point, a first element (D1) connected in parallel with the capacitive element (C), a first switching element (S1) provided in series between the first node (A) and a voltage source point, a second switching element (S2) provided between the first node (A) and a second node (Node B), a second element (D2) connected between the second switching element (S2), the load point, and the reference point, and timing control logic configured to implement three stages. In a charging stage, the first switching element (S1) is closed and the second switching element (S2) to charge a nodal voltage vD(t) at the first node (A). In discharge stage, the first switching element (S1) is open and the second switching element (S2) is open to enable discharging of the capacitive element (C) through the first element (D1). In a transfer stage, the second switching element (S2) is closed to connect the first node (A) and the second node (B), after which the second switching element (S2) is opened and the second element (D2) is biased to present the high-impedance load.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRONIC CIRCUITRY ELECTRICITY IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS RESONATORS |
| title | AN ELECTRONIC CIRCUIT THAT GENERATES A HIGH-IMPEDANCE LOAD AND AN ASSOCIATED METHOD |
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