PERIODIC SEMICONDUCTOR DEVICE MISREGISTRATION METROLOGY SYSTEM AND METHOD

A misregistration metrology system and method useful in the manufacture of semiconductor devices, the multilayered semiconductor devices including a first periodic structure having a first pitch along a first axis, the first periodic structure being formed together with a first layer of the multilayered semiconductor device, a second periodic structure having a second pitch along a second axis, the second axis not being parallel to the first axis, the second periodic structure being formed together with the first layer of the multilayered semiconductor device and a third periodic structure having a third pitch along a third axis, the third axis not being parallel to the first axis and the third axis not being parallel to the second axis, the third periodic structure being formed together with a second layer of the multilayered semiconductor device, the third periodic structure and the first and second periodic structures overlying one another, the misregistration metrology system and method including generating a single image of the first periodic structure, the second periodic structure and third periodic structure, thereby providing an aggregate signal, extracting a first component from the aggregate signal, the first component being due to the first periodic structure, extracting a second component from the aggregate signal, the second component being due to the second periodic structure, extracting a third component from the aggregate signal, the third component being due to the third periodic structure and analyzing the first component, the second component and the third component, thereby to ascertain misregistration between the first layer and the second layer.