TRANSLATION DEVICE, TEST SYSTEM INCLUDING THE SAME, AND MEMORY SYSTEM INCLUDING THE TRANSLATION DEVICE
A translation device, a test system, and a memory system are provided. The translation device includes plural first input/output (I/O) circuits that respectively transmit and receive first signals through plural pins based on a pulse amplitude modulation (PAM)-M mode, a second I/O circuit that trans...
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creator | JIN, Hyungmin SON, Younghoon CHOI, Junghwan CHO, Hyunyoon CHOI, Youngdon |
description | A translation device, a test system, and a memory system are provided. The translation device includes plural first input/output (I/O) circuits that respectively transmit and receive first signals through plural pins based on a pulse amplitude modulation (PAM)-M mode, a second I/O circuit that transmits and receives a second signal through one or more pins based on a PAM-N mode, and a translation circuit that translates the first signals into the second signal and translates the second signal into the first signals. M and N are different integers of 2 or more. |
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The translation device includes plural first input/output (I/O) circuits that respectively transmit and receive first signals through plural pins based on a pulse amplitude modulation (PAM)-M mode, a second I/O circuit that transmits and receives a second signal through one or more pins based on a PAM-N mode, and a translation circuit that translates the first signals into the second signal and translates the second signal into the first signals. M and N are different integers of 2 or more.</abstract><oa>free_for_read</oa></addata></record> |
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language | eng ; fre ; ger |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | TRANSLATION DEVICE, TEST SYSTEM INCLUDING THE SAME, AND MEMORY SYSTEM INCLUDING THE TRANSLATION DEVICE |
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