TRANSLATION DEVICE, TEST SYSTEM INCLUDING THE SAME, AND MEMORY SYSTEM INCLUDING THE TRANSLATION DEVICE

A translation device, a test system, and a memory system are provided. The translation device includes plural first input/output (I/O) circuits that respectively transmit and receive first signals through plural pins based on a pulse amplitude modulation (PAM)-M mode, a second I/O circuit that trans...

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Hauptverfasser: JIN, Hyungmin, SON, Younghoon, CHOI, Junghwan, CHO, Hyunyoon, CHOI, Youngdon
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Sprache:eng ; fre ; ger
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creator JIN, Hyungmin
SON, Younghoon
CHOI, Junghwan
CHO, Hyunyoon
CHOI, Youngdon
description A translation device, a test system, and a memory system are provided. The translation device includes plural first input/output (I/O) circuits that respectively transmit and receive first signals through plural pins based on a pulse amplitude modulation (PAM)-M mode, a second I/O circuit that transmits and receives a second signal through one or more pins based on a PAM-N mode, and a translation circuit that translates the first signals into the second signal and translates the second signal into the first signals. M and N are different integers of 2 or more.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP4016318A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP4016318A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP4016318A13</originalsourceid><addsrcrecordid>eNrjZEgLCXL0C_ZxDPH091NwcQ3zdHbVUQhxDQ5RCI4MDnH1VfD0c_YJdfH0c1cI8XBVCHb0Bco7-rko-Lr6-gdFYleFaSYPA2taYk5xKi-U5mZQcHMNcfbQTS3Ij08tLkhMTs1LLYl3DTAxMDQzNrRwNDQmQgkAWbo0sQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>TRANSLATION DEVICE, TEST SYSTEM INCLUDING THE SAME, AND MEMORY SYSTEM INCLUDING THE TRANSLATION DEVICE</title><source>esp@cenet</source><creator>JIN, Hyungmin ; SON, Younghoon ; CHOI, Junghwan ; CHO, Hyunyoon ; CHOI, Youngdon</creator><creatorcontrib>JIN, Hyungmin ; SON, Younghoon ; CHOI, Junghwan ; CHO, Hyunyoon ; CHOI, Youngdon</creatorcontrib><description>A translation device, a test system, and a memory system are provided. The translation device includes plural first input/output (I/O) circuits that respectively transmit and receive first signals through plural pins based on a pulse amplitude modulation (PAM)-M mode, a second I/O circuit that transmits and receives a second signal through one or more pins based on a PAM-N mode, and a translation circuit that translates the first signals into the second signal and translates the second signal into the first signals. M and N are different integers of 2 or more.</description><language>eng ; fre ; ger</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2022</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220622&amp;DB=EPODOC&amp;CC=EP&amp;NR=4016318A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20220622&amp;DB=EPODOC&amp;CC=EP&amp;NR=4016318A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>JIN, Hyungmin</creatorcontrib><creatorcontrib>SON, Younghoon</creatorcontrib><creatorcontrib>CHOI, Junghwan</creatorcontrib><creatorcontrib>CHO, Hyunyoon</creatorcontrib><creatorcontrib>CHOI, Youngdon</creatorcontrib><title>TRANSLATION DEVICE, TEST SYSTEM INCLUDING THE SAME, AND MEMORY SYSTEM INCLUDING THE TRANSLATION DEVICE</title><description>A translation device, a test system, and a memory system are provided. The translation device includes plural first input/output (I/O) circuits that respectively transmit and receive first signals through plural pins based on a pulse amplitude modulation (PAM)-M mode, a second I/O circuit that transmits and receives a second signal through one or more pins based on a PAM-N mode, and a translation circuit that translates the first signals into the second signal and translates the second signal into the first signals. M and N are different integers of 2 or more.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2022</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZEgLCXL0C_ZxDPH091NwcQ3zdHbVUQhxDQ5RCI4MDnH1VfD0c_YJdfH0c1cI8XBVCHb0Bco7-rko-Lr6-gdFYleFaSYPA2taYk5xKi-U5mZQcHMNcfbQTS3Ij08tLkhMTs1LLYl3DTAxMDQzNrRwNDQmQgkAWbo0sQ</recordid><startdate>20220622</startdate><enddate>20220622</enddate><creator>JIN, Hyungmin</creator><creator>SON, Younghoon</creator><creator>CHOI, Junghwan</creator><creator>CHO, Hyunyoon</creator><creator>CHOI, Youngdon</creator><scope>EVB</scope></search><sort><creationdate>20220622</creationdate><title>TRANSLATION DEVICE, TEST SYSTEM INCLUDING THE SAME, AND MEMORY SYSTEM INCLUDING THE TRANSLATION DEVICE</title><author>JIN, Hyungmin ; SON, Younghoon ; CHOI, Junghwan ; CHO, Hyunyoon ; CHOI, Youngdon</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP4016318A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2022</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>JIN, Hyungmin</creatorcontrib><creatorcontrib>SON, Younghoon</creatorcontrib><creatorcontrib>CHOI, Junghwan</creatorcontrib><creatorcontrib>CHO, Hyunyoon</creatorcontrib><creatorcontrib>CHOI, Youngdon</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>JIN, Hyungmin</au><au>SON, Younghoon</au><au>CHOI, Junghwan</au><au>CHO, Hyunyoon</au><au>CHOI, Youngdon</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>TRANSLATION DEVICE, TEST SYSTEM INCLUDING THE SAME, AND MEMORY SYSTEM INCLUDING THE TRANSLATION DEVICE</title><date>2022-06-22</date><risdate>2022</risdate><abstract>A translation device, a test system, and a memory system are provided. The translation device includes plural first input/output (I/O) circuits that respectively transmit and receive first signals through plural pins based on a pulse amplitude modulation (PAM)-M mode, a second I/O circuit that transmits and receives a second signal through one or more pins based on a PAM-N mode, and a translation circuit that translates the first signals into the second signal and translates the second signal into the first signals. M and N are different integers of 2 or more.</abstract><oa>free_for_read</oa></addata></record>
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language eng ; fre ; ger
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title TRANSLATION DEVICE, TEST SYSTEM INCLUDING THE SAME, AND MEMORY SYSTEM INCLUDING THE TRANSLATION DEVICE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-02T21%3A26%3A29IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=JIN,%20Hyungmin&rft.date=2022-06-22&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP4016318A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true