IDENTIFYING TEST COVERAGE GAPS FOR INTEGRATED CIRCUIT DESIGNS BASED ON NODE TESTABILITY AND PHYSICAL DESIGN DATA

Test coverage for a circuit design may be determined by obtaining node testability data and physical location data for each node of a plurality of nodes in the circuit design. A determination is made that one or more low test coverage areas within the circuit design include untested nodes based on t...

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Bibliographische Detailangaben
Hauptverfasser: NARULA, Kapil, JINDAL, Anurag, LIANG, Hongkun, KALYAN, Rahul
Format: Patent
Sprache:eng ; fre ; ger
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