PROGRAMMABLE FREQUENCY RANGE FOR BOOST CONVERTER CLOCKS
Techniques for generating a boost clock signal for a boost converter from a buck converter clock signal, wherein the boost clock signal has a limited frequency range. In an aspect, the boost clock signal has a maximum frequency determined by Vbst / T, wherein Vbst represents the difference between a...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng ; fre ; ger |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | SHI, Yunfei MATHE, Lennart Karl-Axel LI, Pengfei SHI, Song S |
description | Techniques for generating a boost clock signal for a boost converter from a buck converter clock signal, wherein the boost clock signal has a limited frequency range. In an aspect, the boost clock signal has a maximum frequency determined by Vbst / T, wherein Vbst represents the difference between a target output voltage and a battery voltage, and T represents a predetermined cycle duration. The boost converter may include a pulse insertion block to limit the minimum frequency of the boost clock signal, and a dynamic blanking / delay block to limit the maximum frequency of the boost clock signal. Further techniques are disclosed for generally implementing the minimum frequency limiting and maximum frequency limiting blocks. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP3985854B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP3985854B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP3985854B13</originalsourceid><addsrcrecordid>eNrjZDAPCPJ3D3L09XV08nFVcAtyDQx19XOOVAhy9HMH8v2DFJz8_YNDFJz9_cJcg0JcgxScffydvYN5GFjTEnOKU3mhNDeDgptriLOHbmpBfnxqcUFicmpeakm8a4CxpYWphamJk6ExEUoAB00oGQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PROGRAMMABLE FREQUENCY RANGE FOR BOOST CONVERTER CLOCKS</title><source>esp@cenet</source><creator>SHI, Yunfei ; MATHE, Lennart Karl-Axel ; LI, Pengfei ; SHI, Song S</creator><creatorcontrib>SHI, Yunfei ; MATHE, Lennart Karl-Axel ; LI, Pengfei ; SHI, Song S</creatorcontrib><description>Techniques for generating a boost clock signal for a boost converter from a buck converter clock signal, wherein the boost clock signal has a limited frequency range. In an aspect, the boost clock signal has a maximum frequency determined by Vbst / T, wherein Vbst represents the difference between a target output voltage and a battery voltage, and T represents a predetermined cycle duration. The boost converter may include a pulse insertion block to limit the minimum frequency of the boost clock signal, and a dynamic blanking / delay block to limit the maximum frequency of the boost clock signal. Further techniques are disclosed for generally implementing the minimum frequency limiting and maximum frequency limiting blocks.</description><language>eng ; fre ; ger</language><subject>AMPLIFIERS ; APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS ; BASIC ELECTRONIC CIRCUITRY ; CONTROL OR REGULATION THEREOF ; CONTROLLING ; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER ; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ; ELECTRICITY ; GENERATION ; PHYSICS ; REGULATING ; SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230823&DB=EPODOC&CC=EP&NR=3985854B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230823&DB=EPODOC&CC=EP&NR=3985854B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SHI, Yunfei</creatorcontrib><creatorcontrib>MATHE, Lennart Karl-Axel</creatorcontrib><creatorcontrib>LI, Pengfei</creatorcontrib><creatorcontrib>SHI, Song S</creatorcontrib><title>PROGRAMMABLE FREQUENCY RANGE FOR BOOST CONVERTER CLOCKS</title><description>Techniques for generating a boost clock signal for a boost converter from a buck converter clock signal, wherein the boost clock signal has a limited frequency range. In an aspect, the boost clock signal has a maximum frequency determined by Vbst / T, wherein Vbst represents the difference between a target output voltage and a battery voltage, and T represents a predetermined cycle duration. The boost converter may include a pulse insertion block to limit the minimum frequency of the boost clock signal, and a dynamic blanking / delay block to limit the maximum frequency of the boost clock signal. Further techniques are disclosed for generally implementing the minimum frequency limiting and maximum frequency limiting blocks.</description><subject>AMPLIFIERS</subject><subject>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CONTROL OR REGULATION THEREOF</subject><subject>CONTROLLING</subject><subject>CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER</subject><subject>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</subject><subject>ELECTRICITY</subject><subject>GENERATION</subject><subject>PHYSICS</subject><subject>REGULATING</subject><subject>SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAPCPJ3D3L09XV08nFVcAtyDQx19XOOVAhy9HMH8v2DFJz8_YNDFJz9_cJcg0JcgxScffydvYN5GFjTEnOKU3mhNDeDgptriLOHbmpBfnxqcUFicmpeakm8a4CxpYWphamJk6ExEUoAB00oGQ</recordid><startdate>20230823</startdate><enddate>20230823</enddate><creator>SHI, Yunfei</creator><creator>MATHE, Lennart Karl-Axel</creator><creator>LI, Pengfei</creator><creator>SHI, Song S</creator><scope>EVB</scope></search><sort><creationdate>20230823</creationdate><title>PROGRAMMABLE FREQUENCY RANGE FOR BOOST CONVERTER CLOCKS</title><author>SHI, Yunfei ; MATHE, Lennart Karl-Axel ; LI, Pengfei ; SHI, Song S</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP3985854B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2023</creationdate><topic>AMPLIFIERS</topic><topic>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CONTROL OR REGULATION THEREOF</topic><topic>CONTROLLING</topic><topic>CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER</topic><topic>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</topic><topic>ELECTRICITY</topic><topic>GENERATION</topic><topic>PHYSICS</topic><topic>REGULATING</topic><topic>SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES</topic><toplevel>online_resources</toplevel><creatorcontrib>SHI, Yunfei</creatorcontrib><creatorcontrib>MATHE, Lennart Karl-Axel</creatorcontrib><creatorcontrib>LI, Pengfei</creatorcontrib><creatorcontrib>SHI, Song S</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SHI, Yunfei</au><au>MATHE, Lennart Karl-Axel</au><au>LI, Pengfei</au><au>SHI, Song S</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PROGRAMMABLE FREQUENCY RANGE FOR BOOST CONVERTER CLOCKS</title><date>2023-08-23</date><risdate>2023</risdate><abstract>Techniques for generating a boost clock signal for a boost converter from a buck converter clock signal, wherein the boost clock signal has a limited frequency range. In an aspect, the boost clock signal has a maximum frequency determined by Vbst / T, wherein Vbst represents the difference between a target output voltage and a battery voltage, and T represents a predetermined cycle duration. The boost converter may include a pulse insertion block to limit the minimum frequency of the boost clock signal, and a dynamic blanking / delay block to limit the maximum frequency of the boost clock signal. Further techniques are disclosed for generally implementing the minimum frequency limiting and maximum frequency limiting blocks.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng ; fre ; ger |
recordid | cdi_epo_espacenet_EP3985854B1 |
source | esp@cenet |
subjects | AMPLIFIERS APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS BASIC ELECTRONIC CIRCUITRY CONTROL OR REGULATION THEREOF CONTROLLING CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ELECTRICITY GENERATION PHYSICS REGULATING SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES |
title | PROGRAMMABLE FREQUENCY RANGE FOR BOOST CONVERTER CLOCKS |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-02T11%3A34%3A06IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SHI,%20Yunfei&rft.date=2023-08-23&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP3985854B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |