METHOD OF FABRICATING A SEMICONDUCTOR STRUCTURE WITH IMPROVED DICING PROPERTIES
A method of fabricating a semiconductor structure is disclosed. The method comprises: forming a first metal layer over a wafer; forming a second metal layer over the first metal layer; forming a first porous structure in a first region of the second metal layer located above a circuit area of the wa...
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Format: | Patent |
Sprache: | eng ; fre ; ger |
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Zusammenfassung: | A method of fabricating a semiconductor structure is disclosed. The method comprises: forming a first metal layer over a wafer; forming a second metal layer over the first metal layer; forming a first porous structure in a first region of the second metal layer located above a circuit area of the wafer and a second porous structure in a second region of the second metal layer located above a dicing area of the wafer, wherein the first porous structure includes a first set of pores, and wherein the second porous structure includes a second set of pores; forming a metal-insulator-metal stack in the first set of pores of the first porous structure; and etching the second set of pores of the second porous structure to expose the dicing area of the silicon wafer. |
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