SEMICONDUCTOR SWITCH ELEMENT AND METHOD OF MANUFACTURING THE SAME

SEMICONDUCTOR SWITCH ELEMENT AND METHOD OF MANUFACTURING THE SAME

The application relates to a semiconductor switch element (10), comprising a first vertical transistor device (1.1) formed in a substrate (8), having a source region formed on a first side of the substrate and a drain region (4.1) formed on a second side of the substrate, vertically opposite to the...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Oszinda, Thomas, Ananiev, Sergey, Leomant, Sylvain, Noebauer, Gerhard, Gruber, Christian
Format: Patent
Sprache:eng ; fre ; ger
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Oszinda, Thomas
Ananiev, Sergey
Leomant, Sylvain
Noebauer, Gerhard
Gruber, Christian
description The application relates to a semiconductor switch element (10), comprising a first vertical transistor device (1.1) formed in a substrate (8), having a source region formed on a first side of the substrate and a drain region (4.1) formed on a second side of the substrate, vertically opposite to the first side, a second vertical transistor device (1.2) formed laterally aside the first vertical transistor device in the same substrate (8), having a source region formed on the first side of the substrate and a drain region (4.2) formed on the second side of the substrate, a conductive element (9) arranged on the second side of the substrate, electrically connecting the drain regions of the vertical transistor devices, wherein a trench (11) extending vertically into the substrate is formed on the second side of the substrate, and wherein at least a part (9.1) of the conductive element is arranged in the trench.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP3836201A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP3836201A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP3836201A13</originalsourceid><addsrcrecordid>eNrjZHAMdvX1dPb3cwl1DvEPUggO9wxx9lBw9XH1dfULUXD0c1HwdQ3x8HdR8HdT8HX0C3VzdA4JDfL0c1cI8XBVCHb0deVhYE1LzClO5YXS3AwKbq5AQ3RTC_LjU4sLEpNT81JL4l0DjC2MzYwMDB0NjYlQAgCJ-Cp9</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR SWITCH ELEMENT AND METHOD OF MANUFACTURING THE SAME</title><source>esp@cenet</source><creator>Oszinda, Thomas ; Ananiev, Sergey ; Leomant, Sylvain ; Noebauer, Gerhard ; Gruber, Christian</creator><creatorcontrib>Oszinda, Thomas ; Ananiev, Sergey ; Leomant, Sylvain ; Noebauer, Gerhard ; Gruber, Christian</creatorcontrib><description>The application relates to a semiconductor switch element (10), comprising a first vertical transistor device (1.1) formed in a substrate (8), having a source region formed on a first side of the substrate and a drain region (4.1) formed on a second side of the substrate, vertically opposite to the first side, a second vertical transistor device (1.2) formed laterally aside the first vertical transistor device in the same substrate (8), having a source region formed on the first side of the substrate and a drain region (4.2) formed on the second side of the substrate, a conductive element (9) arranged on the second side of the substrate, electrically connecting the drain regions of the vertical transistor devices, wherein a trench (11) extending vertically into the substrate is formed on the second side of the substrate, and wherein at least a part (9.1) of the conductive element is arranged in the trench.</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210616&amp;DB=EPODOC&amp;CC=EP&amp;NR=3836201A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20210616&amp;DB=EPODOC&amp;CC=EP&amp;NR=3836201A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Oszinda, Thomas</creatorcontrib><creatorcontrib>Ananiev, Sergey</creatorcontrib><creatorcontrib>Leomant, Sylvain</creatorcontrib><creatorcontrib>Noebauer, Gerhard</creatorcontrib><creatorcontrib>Gruber, Christian</creatorcontrib><title>SEMICONDUCTOR SWITCH ELEMENT AND METHOD OF MANUFACTURING THE SAME</title><description>The application relates to a semiconductor switch element (10), comprising a first vertical transistor device (1.1) formed in a substrate (8), having a source region formed on a first side of the substrate and a drain region (4.1) formed on a second side of the substrate, vertically opposite to the first side, a second vertical transistor device (1.2) formed laterally aside the first vertical transistor device in the same substrate (8), having a source region formed on the first side of the substrate and a drain region (4.2) formed on the second side of the substrate, a conductive element (9) arranged on the second side of the substrate, electrically connecting the drain regions of the vertical transistor devices, wherein a trench (11) extending vertically into the substrate is formed on the second side of the substrate, and wherein at least a part (9.1) of the conductive element is arranged in the trench.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHAMdvX1dPb3cwl1DvEPUggO9wxx9lBw9XH1dfULUXD0c1HwdQ3x8HdR8HdT8HX0C3VzdA4JDfL0c1cI8XBVCHb0deVhYE1LzClO5YXS3AwKbq5AQ3RTC_LjU4sLEpNT81JL4l0DjC2MzYwMDB0NjYlQAgCJ-Cp9</recordid><startdate>20210616</startdate><enddate>20210616</enddate><creator>Oszinda, Thomas</creator><creator>Ananiev, Sergey</creator><creator>Leomant, Sylvain</creator><creator>Noebauer, Gerhard</creator><creator>Gruber, Christian</creator><scope>EVB</scope></search><sort><creationdate>20210616</creationdate><title>SEMICONDUCTOR SWITCH ELEMENT AND METHOD OF MANUFACTURING THE SAME</title><author>Oszinda, Thomas ; Ananiev, Sergey ; Leomant, Sylvain ; Noebauer, Gerhard ; Gruber, Christian</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP3836201A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2021</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Oszinda, Thomas</creatorcontrib><creatorcontrib>Ananiev, Sergey</creatorcontrib><creatorcontrib>Leomant, Sylvain</creatorcontrib><creatorcontrib>Noebauer, Gerhard</creatorcontrib><creatorcontrib>Gruber, Christian</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Oszinda, Thomas</au><au>Ananiev, Sergey</au><au>Leomant, Sylvain</au><au>Noebauer, Gerhard</au><au>Gruber, Christian</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR SWITCH ELEMENT AND METHOD OF MANUFACTURING THE SAME</title><date>2021-06-16</date><risdate>2021</risdate><abstract>The application relates to a semiconductor switch element (10), comprising a first vertical transistor device (1.1) formed in a substrate (8), having a source region formed on a first side of the substrate and a drain region (4.1) formed on a second side of the substrate, vertically opposite to the first side, a second vertical transistor device (1.2) formed laterally aside the first vertical transistor device in the same substrate (8), having a source region formed on the first side of the substrate and a drain region (4.2) formed on the second side of the substrate, a conductive element (9) arranged on the second side of the substrate, electrically connecting the drain regions of the vertical transistor devices, wherein a trench (11) extending vertically into the substrate is formed on the second side of the substrate, and wherein at least a part (9.1) of the conductive element is arranged in the trench.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng ; fre ; ger
recordid cdi_epo_espacenet_EP3836201A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR SWITCH ELEMENT AND METHOD OF MANUFACTURING THE SAME
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-03T08%3A04%3A37IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Oszinda,%20Thomas&rft.date=2021-06-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EEP3836201A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true