SEMICONDUCTOR PLUG PROTECTED BY PROTECTIVE DIELECTRIC LAYER IN THREE-DIMENSIONAL MEMORY DEVICE AND METHOD FOR FORMING THE SAME
Embodiments of 3D memory devices with a semiconductor plug protected by a dielectric layer and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack including a plurality of interleaved conductor layers and dielectric layers on the substra...
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creator | ZHANG, Fushan WANG, EnBo YANG, Haohao XU, Qianbing ZHANG, Ruo Fang ZHANG, Yong |
description | Embodiments of 3D memory devices with a semiconductor plug protected by a dielectric layer and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack including a plurality of interleaved conductor layers and dielectric layers on the substrate, and a memory string extending vertically through the memory stack. The memory string includes a semiconductor plug in a lower portion of the memory string, a protective dielectric layer on the semiconductor plug, and a memory film above the protective dielectric layer and along a sidewall of the memory string. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP3811406A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP3811406A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP3811406A13</originalsourceid><addsrcrecordid>eNqNTL0KwjAY7OIg6jt8L1CwKOIak2v7QX5KmhY6lSJxEi3U2Wc3g-4Ox_1wd-vs3cKwdFZ1MjhPje4qarwLkAGKLsPPcA9SDJ2kZ0laDPDElkLtgVyxgW3ZWaHJwDg_kELPEiSsSkmonaIy_ScYtlWagVphsM1Wt-m-xN2XNxmVCLLO4_wc4zJP1_iIrxHN4VwUx_1JFIc_Kh-nZzs9</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR PLUG PROTECTED BY PROTECTIVE DIELECTRIC LAYER IN THREE-DIMENSIONAL MEMORY DEVICE AND METHOD FOR FORMING THE SAME</title><source>esp@cenet</source><creator>ZHANG, Fushan ; WANG, EnBo ; YANG, Haohao ; XU, Qianbing ; ZHANG, Ruo Fang ; ZHANG, Yong</creator><creatorcontrib>ZHANG, Fushan ; WANG, EnBo ; YANG, Haohao ; XU, Qianbing ; ZHANG, Ruo Fang ; ZHANG, Yong</creatorcontrib><description>Embodiments of 3D memory devices with a semiconductor plug protected by a dielectric layer and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack including a plurality of interleaved conductor layers and dielectric layers on the substrate, and a memory string extending vertically through the memory stack. The memory string includes a semiconductor plug in a lower portion of the memory string, a protective dielectric layer on the semiconductor plug, and a memory film above the protective dielectric layer and along a sidewall of the memory string.</description><language>eng ; fre ; ger</language><subject>ELECTRICITY</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210428&DB=EPODOC&CC=EP&NR=3811406A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210428&DB=EPODOC&CC=EP&NR=3811406A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ZHANG, Fushan</creatorcontrib><creatorcontrib>WANG, EnBo</creatorcontrib><creatorcontrib>YANG, Haohao</creatorcontrib><creatorcontrib>XU, Qianbing</creatorcontrib><creatorcontrib>ZHANG, Ruo Fang</creatorcontrib><creatorcontrib>ZHANG, Yong</creatorcontrib><title>SEMICONDUCTOR PLUG PROTECTED BY PROTECTIVE DIELECTRIC LAYER IN THREE-DIMENSIONAL MEMORY DEVICE AND METHOD FOR FORMING THE SAME</title><description>Embodiments of 3D memory devices with a semiconductor plug protected by a dielectric layer and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack including a plurality of interleaved conductor layers and dielectric layers on the substrate, and a memory string extending vertically through the memory stack. The memory string includes a semiconductor plug in a lower portion of the memory string, a protective dielectric layer on the semiconductor plug, and a memory film above the protective dielectric layer and along a sidewall of the memory string.</description><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNTL0KwjAY7OIg6jt8L1CwKOIak2v7QX5KmhY6lSJxEi3U2Wc3g-4Ox_1wd-vs3cKwdFZ1MjhPje4qarwLkAGKLsPPcA9SDJ2kZ0laDPDElkLtgVyxgW3ZWaHJwDg_kELPEiSsSkmonaIy_ScYtlWagVphsM1Wt-m-xN2XNxmVCLLO4_wc4zJP1_iIrxHN4VwUx_1JFIc_Kh-nZzs9</recordid><startdate>20210428</startdate><enddate>20210428</enddate><creator>ZHANG, Fushan</creator><creator>WANG, EnBo</creator><creator>YANG, Haohao</creator><creator>XU, Qianbing</creator><creator>ZHANG, Ruo Fang</creator><creator>ZHANG, Yong</creator><scope>EVB</scope></search><sort><creationdate>20210428</creationdate><title>SEMICONDUCTOR PLUG PROTECTED BY PROTECTIVE DIELECTRIC LAYER IN THREE-DIMENSIONAL MEMORY DEVICE AND METHOD FOR FORMING THE SAME</title><author>ZHANG, Fushan ; WANG, EnBo ; YANG, Haohao ; XU, Qianbing ; ZHANG, Ruo Fang ; ZHANG, Yong</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP3811406A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2021</creationdate><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>ZHANG, Fushan</creatorcontrib><creatorcontrib>WANG, EnBo</creatorcontrib><creatorcontrib>YANG, Haohao</creatorcontrib><creatorcontrib>XU, Qianbing</creatorcontrib><creatorcontrib>ZHANG, Ruo Fang</creatorcontrib><creatorcontrib>ZHANG, Yong</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ZHANG, Fushan</au><au>WANG, EnBo</au><au>YANG, Haohao</au><au>XU, Qianbing</au><au>ZHANG, Ruo Fang</au><au>ZHANG, Yong</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR PLUG PROTECTED BY PROTECTIVE DIELECTRIC LAYER IN THREE-DIMENSIONAL MEMORY DEVICE AND METHOD FOR FORMING THE SAME</title><date>2021-04-28</date><risdate>2021</risdate><abstract>Embodiments of 3D memory devices with a semiconductor plug protected by a dielectric layer and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack including a plurality of interleaved conductor layers and dielectric layers on the substrate, and a memory string extending vertically through the memory stack. The memory string includes a semiconductor plug in a lower portion of the memory string, a protective dielectric layer on the semiconductor plug, and a memory film above the protective dielectric layer and along a sidewall of the memory string.</abstract><oa>free_for_read</oa></addata></record> |
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title | SEMICONDUCTOR PLUG PROTECTED BY PROTECTIVE DIELECTRIC LAYER IN THREE-DIMENSIONAL MEMORY DEVICE AND METHOD FOR FORMING THE SAME |
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