VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF

A vector friendly instruction format and execution thereof. According to one embodiment of the invention, a processor is configured to execute an instruction set. The instruction set includes a vector friendly instruction format. The vector friendly instruction format has a plurality of fields inclu...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	CHARNEY, Mark, DURAN, Santiago Galan, OULD-AHMED-VALL, Elmoustapha, CAVIN, Robert D, GIRKAR, Milind Baburao, SANS, Roger Espasa, ABEL, James C, WU, Lisa, VALENTINE, Robert C, SAN ADRIAN, Jesus Corbal, SAIR, Suleyman, GROCHOWSKI, Edward Thomas, YOUNT, Charles, TOLL, Bret L, HALL, Jonathan Cannon, BRADFORD, Dennis R, ABRAHAM, Seth, WIEDEMEIER, Jeffrey G, SAMUDRALA, Sridhar, FORSYTH, Andrew Thomas
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!