METHOD OF DEADLOCK DETECTION AND SYNCHRONIZATION-AWARE OPTIMIZATIONS ON ASYNCHRONOUS PROCESSOR ARCHITECTURES

A method for improving the performance of applications executed within asynchronous processor architectures. In an embodiment, a method for improving execution time of compiled synchronized source code on an asynchronous processor architecture includes receiving, by a processing system, synchronized...

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Bibliographische Detailangaben

Hauptverfasser:	GAO, Yaoqing, RODRIGUES, Christopher, ELTANTAWY, Ahmed, HAI, Lijuan
Format:	Patent
Sprache:	eng ; fre ; ger
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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