A DETECTION CIRCUIT, CORRESPONDING DEVICE AND METHOD
An envelope detection circuit (20) is described. The circuit (20) comprises:- an input node (204) configured to receive an input analog signal (VRF) resulting from amplitude modulation of a radio-frequency carrier by a digital signal,- an output node (208) configured to provide an output signal (Vou...
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| creator | CANEGALLO, Roberto ELGANI, Alessia Maria GNUDI, Antonio PERILLI, Luca RICOTTI, Giulio FRANCHI SCARSELLI, Eleonora RENZINI, Francesco |
| description | An envelope detection circuit (20) is described. The circuit (20) comprises:- an input node (204) configured to receive an input analog signal (VRF) resulting from amplitude modulation of a radio-frequency carrier by a digital signal,- an output node (208) configured to provide an output signal (Vout) indicative of rising and falling edges of an envelope of said input analog signal (VRF) received, said rising and falling edges being indicative of rising and falling edges of said digital signal, and- a first current path between a power supply node (Vdd) and the input node (204), the first current path comprising at least one first transistor (M1) having the current path therethrough coupled between the input node (204) and a first bias source (G1,Ibias), the first bias source (G1,Ibias) coupled between the at least one first transistor (M1) and the power supply node (Vdd).The output node (208) is coupled to a node in the first current path intermediate the at least one first transistor (M1) and the first bias source (G1), and a control terminal of the at least one first transistor (M1) is coupled to the output node (208) via a feedback network (R, C). |
| format | Patent |
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The circuit (20) comprises:- an input node (204) configured to receive an input analog signal (VRF) resulting from amplitude modulation of a radio-frequency carrier by a digital signal,- an output node (208) configured to provide an output signal (Vout) indicative of rising and falling edges of an envelope of said input analog signal (VRF) received, said rising and falling edges being indicative of rising and falling edges of said digital signal, and- a first current path between a power supply node (Vdd) and the input node (204), the first current path comprising at least one first transistor (M1) having the current path therethrough coupled between the input node (204) and a first bias source (G1,Ibias), the first bias source (G1,Ibias) coupled between the at least one first transistor (M1) and the power supply node (Vdd).The output node (208) is coupled to a node in the first current path intermediate the at least one first transistor (M1) and the first bias source (G1), and a control terminal of the at least one first transistor (M1) is coupled to the output node (208) via a feedback network (R, C).</description><language>eng ; fre ; ger</language><subject>BASIC ELECTRONIC CIRCUITRY ; DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2021</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210623&DB=EPODOC&CC=EP&NR=3664286B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20210623&DB=EPODOC&CC=EP&NR=3664286B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CANEGALLO, Roberto</creatorcontrib><creatorcontrib>ELGANI, Alessia Maria</creatorcontrib><creatorcontrib>GNUDI, Antonio</creatorcontrib><creatorcontrib>PERILLI, Luca</creatorcontrib><creatorcontrib>RICOTTI, Giulio</creatorcontrib><creatorcontrib>FRANCHI SCARSELLI, Eleonora</creatorcontrib><creatorcontrib>RENZINI, Francesco</creatorcontrib><title>A DETECTION CIRCUIT, CORRESPONDING DEVICE AND METHOD</title><description>An envelope detection circuit (20) is described. The circuit (20) comprises:- an input node (204) configured to receive an input analog signal (VRF) resulting from amplitude modulation of a radio-frequency carrier by a digital signal,- an output node (208) configured to provide an output signal (Vout) indicative of rising and falling edges of an envelope of said input analog signal (VRF) received, said rising and falling edges being indicative of rising and falling edges of said digital signal, and- a first current path between a power supply node (Vdd) and the input node (204), the first current path comprising at least one first transistor (M1) having the current path therethrough coupled between the input node (204) and a first bias source (G1,Ibias), the first bias source (G1,Ibias) coupled between the at least one first transistor (M1) and the power supply node (Vdd).The output node (208) is coupled to a node in the first current path intermediate the at least one first transistor (M1) and the first bias source (G1), and a control terminal of the at least one first transistor (M1) is coupled to the output node (208) via a feedback network (R, C).</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2021</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDBxVHBxDXF1DvH091Nw9gxyDvUM0VFw9g8Kcg0O8Pdz8fRzByoI83R2VXD0c1HwdQ3x8HfhYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxrgHGZmYmRhZmTobGRCgBAF_GJss</recordid><startdate>20210623</startdate><enddate>20210623</enddate><creator>CANEGALLO, Roberto</creator><creator>ELGANI, Alessia Maria</creator><creator>GNUDI, Antonio</creator><creator>PERILLI, Luca</creator><creator>RICOTTI, Giulio</creator><creator>FRANCHI SCARSELLI, Eleonora</creator><creator>RENZINI, Francesco</creator><scope>EVB</scope></search><sort><creationdate>20210623</creationdate><title>A DETECTION CIRCUIT, CORRESPONDING DEVICE AND METHOD</title><author>CANEGALLO, Roberto ; ELGANI, Alessia Maria ; GNUDI, Antonio ; PERILLI, Luca ; RICOTTI, Giulio ; FRANCHI SCARSELLI, Eleonora ; RENZINI, Francesco</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP3664286B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2021</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>CANEGALLO, Roberto</creatorcontrib><creatorcontrib>ELGANI, Alessia Maria</creatorcontrib><creatorcontrib>GNUDI, Antonio</creatorcontrib><creatorcontrib>PERILLI, Luca</creatorcontrib><creatorcontrib>RICOTTI, Giulio</creatorcontrib><creatorcontrib>FRANCHI SCARSELLI, Eleonora</creatorcontrib><creatorcontrib>RENZINI, Francesco</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CANEGALLO, Roberto</au><au>ELGANI, Alessia Maria</au><au>GNUDI, Antonio</au><au>PERILLI, Luca</au><au>RICOTTI, Giulio</au><au>FRANCHI SCARSELLI, Eleonora</au><au>RENZINI, Francesco</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>A DETECTION CIRCUIT, CORRESPONDING DEVICE AND METHOD</title><date>2021-06-23</date><risdate>2021</risdate><abstract>An envelope detection circuit (20) is described. The circuit (20) comprises:- an input node (204) configured to receive an input analog signal (VRF) resulting from amplitude modulation of a radio-frequency carrier by a digital signal,- an output node (208) configured to provide an output signal (Vout) indicative of rising and falling edges of an envelope of said input analog signal (VRF) received, said rising and falling edges being indicative of rising and falling edges of said digital signal, and- a first current path between a power supply node (Vdd) and the input node (204), the first current path comprising at least one first transistor (M1) having the current path therethrough coupled between the input node (204) and a first bias source (G1,Ibias), the first bias source (G1,Ibias) coupled between the at least one first transistor (M1) and the power supply node (Vdd).The output node (208) is coupled to a node in the first current path intermediate the at least one first transistor (M1) and the first bias source (G1), and a control terminal of the at least one first transistor (M1) is coupled to the output node (208) via a feedback network (R, C).</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRONIC CIRCUITRY DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TOANOTHER ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
| title | A DETECTION CIRCUIT, CORRESPONDING DEVICE AND METHOD |
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