SEMICONDUCTOR PACKAGE WITH AIR CAVITY
Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to t...
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creator | KUEK, Hsieh Ting ABDUL WAHID, Junny OTHMAN, Nurfarena CHIANG, Chau Fatt LEE, Chee Hong CHONG, Hock Heng CHUA, Kok Yau TUAZON BERNARDEZ, April Coleen CHIN, Kon Hoe SCHMALZL, Stefan LIEW, Soon Lee POK, Pei Luan REISS, Werner BAKAR, Roslie Saini bin |
description | Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_EP3495318A2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>EP3495318A2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_EP3495318A23</originalsourceid><addsrcrecordid>eNrjZFANdvX1dPb3cwl1DvEPUghwdPZ2dHdVCPcM8VBw9AxScHYM8wyJ5GFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8a4BxiaWpsaGFo5GxkQoAQBe4CLr</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR PACKAGE WITH AIR CAVITY</title><source>esp@cenet</source><creator>KUEK, Hsieh Ting ; ABDUL WAHID, Junny ; OTHMAN, Nurfarena ; CHIANG, Chau Fatt ; LEE, Chee Hong ; CHONG, Hock Heng ; CHUA, Kok Yau ; TUAZON BERNARDEZ, April Coleen ; CHIN, Kon Hoe ; SCHMALZL, Stefan ; LIEW, Soon Lee ; POK, Pei Luan ; REISS, Werner ; BAKAR, Roslie Saini bin</creator><creatorcontrib>KUEK, Hsieh Ting ; ABDUL WAHID, Junny ; OTHMAN, Nurfarena ; CHIANG, Chau Fatt ; LEE, Chee Hong ; CHONG, Hock Heng ; CHUA, Kok Yau ; TUAZON BERNARDEZ, April Coleen ; CHIN, Kon Hoe ; SCHMALZL, Stefan ; LIEW, Soon Lee ; POK, Pei Luan ; REISS, Werner ; BAKAR, Roslie Saini bin</creatorcontrib><description>Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.</description><language>eng ; fre ; ger</language><subject>MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES ; MICROSTRUCTURAL TECHNOLOGY ; PERFORMING OPERATIONS ; PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS ; TRANSPORTING</subject><creationdate>2019</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190612&DB=EPODOC&CC=EP&NR=3495318A2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20190612&DB=EPODOC&CC=EP&NR=3495318A2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KUEK, Hsieh Ting</creatorcontrib><creatorcontrib>ABDUL WAHID, Junny</creatorcontrib><creatorcontrib>OTHMAN, Nurfarena</creatorcontrib><creatorcontrib>CHIANG, Chau Fatt</creatorcontrib><creatorcontrib>LEE, Chee Hong</creatorcontrib><creatorcontrib>CHONG, Hock Heng</creatorcontrib><creatorcontrib>CHUA, Kok Yau</creatorcontrib><creatorcontrib>TUAZON BERNARDEZ, April Coleen</creatorcontrib><creatorcontrib>CHIN, Kon Hoe</creatorcontrib><creatorcontrib>SCHMALZL, Stefan</creatorcontrib><creatorcontrib>LIEW, Soon Lee</creatorcontrib><creatorcontrib>POK, Pei Luan</creatorcontrib><creatorcontrib>REISS, Werner</creatorcontrib><creatorcontrib>BAKAR, Roslie Saini bin</creatorcontrib><title>SEMICONDUCTOR PACKAGE WITH AIR CAVITY</title><description>Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.</description><subject>MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES</subject><subject>MICROSTRUCTURAL TECHNOLOGY</subject><subject>PERFORMING OPERATIONS</subject><subject>PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS</subject><subject>TRANSPORTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2019</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFANdvX1dPb3cwl1DvEPUghwdPZ2dHdVCPcM8VBw9AxScHYM8wyJ5GFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8a4BxiaWpsaGFo5GxkQoAQBe4CLr</recordid><startdate>20190612</startdate><enddate>20190612</enddate><creator>KUEK, Hsieh Ting</creator><creator>ABDUL WAHID, Junny</creator><creator>OTHMAN, Nurfarena</creator><creator>CHIANG, Chau Fatt</creator><creator>LEE, Chee Hong</creator><creator>CHONG, Hock Heng</creator><creator>CHUA, Kok Yau</creator><creator>TUAZON BERNARDEZ, April Coleen</creator><creator>CHIN, Kon Hoe</creator><creator>SCHMALZL, Stefan</creator><creator>LIEW, Soon Lee</creator><creator>POK, Pei Luan</creator><creator>REISS, Werner</creator><creator>BAKAR, Roslie Saini bin</creator><scope>EVB</scope></search><sort><creationdate>20190612</creationdate><title>SEMICONDUCTOR PACKAGE WITH AIR CAVITY</title><author>KUEK, Hsieh Ting ; ABDUL WAHID, Junny ; OTHMAN, Nurfarena ; CHIANG, Chau Fatt ; LEE, Chee Hong ; CHONG, Hock Heng ; CHUA, Kok Yau ; TUAZON BERNARDEZ, April Coleen ; CHIN, Kon Hoe ; SCHMALZL, Stefan ; LIEW, Soon Lee ; POK, Pei Luan ; REISS, Werner ; BAKAR, Roslie Saini bin</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_EP3495318A23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng ; fre ; ger</language><creationdate>2019</creationdate><topic>MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES</topic><topic>MICROSTRUCTURAL TECHNOLOGY</topic><topic>PERFORMING OPERATIONS</topic><topic>PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS</topic><topic>TRANSPORTING</topic><toplevel>online_resources</toplevel><creatorcontrib>KUEK, Hsieh Ting</creatorcontrib><creatorcontrib>ABDUL WAHID, Junny</creatorcontrib><creatorcontrib>OTHMAN, Nurfarena</creatorcontrib><creatorcontrib>CHIANG, Chau Fatt</creatorcontrib><creatorcontrib>LEE, Chee Hong</creatorcontrib><creatorcontrib>CHONG, Hock Heng</creatorcontrib><creatorcontrib>CHUA, Kok Yau</creatorcontrib><creatorcontrib>TUAZON BERNARDEZ, April Coleen</creatorcontrib><creatorcontrib>CHIN, Kon Hoe</creatorcontrib><creatorcontrib>SCHMALZL, Stefan</creatorcontrib><creatorcontrib>LIEW, Soon Lee</creatorcontrib><creatorcontrib>POK, Pei Luan</creatorcontrib><creatorcontrib>REISS, Werner</creatorcontrib><creatorcontrib>BAKAR, Roslie Saini bin</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KUEK, Hsieh Ting</au><au>ABDUL WAHID, Junny</au><au>OTHMAN, Nurfarena</au><au>CHIANG, Chau Fatt</au><au>LEE, Chee Hong</au><au>CHONG, Hock Heng</au><au>CHUA, Kok Yau</au><au>TUAZON BERNARDEZ, April Coleen</au><au>CHIN, Kon Hoe</au><au>SCHMALZL, Stefan</au><au>LIEW, Soon Lee</au><au>POK, Pei Luan</au><au>REISS, Werner</au><au>BAKAR, Roslie Saini bin</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR PACKAGE WITH AIR CAVITY</title><date>2019-06-12</date><risdate>2019</risdate><abstract>Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.</abstract><oa>free_for_read</oa></addata></record> |
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language | eng ; fre ; ger |
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subjects | MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICALDEVICES MICROSTRUCTURAL TECHNOLOGY PERFORMING OPERATIONS PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS TRANSPORTING |
title | SEMICONDUCTOR PACKAGE WITH AIR CAVITY |
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