PHASE-LOCKED LOOP HAVING A SAMPLING PHASE DETECTOR

An example a phase-locked loop (PLL) circuit includes a sampling phase detector configured to receive a reference clock and a feedback clock and configured to supply a first control current and a pulse signal. The PLL further includes a charge pump configured to generate a second control current bas...

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Bibliographische Detailangaben
Hauptverfasser: RAJ, Mayank, UPADHYAYA, Parag, BEKELE, Adebabay M
Format: Patent
Sprache:eng ; fre ; ger
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